NI 6587, Irregular clock generation

[Colonel]

I am having an issue running the sample code 'NI 6587 Serial Generation - Export Clock' for my PXIe 7962R setup. Sometimes when I execute the program, I get the expected clock, but other times I get an irregular clock.  I've included a sample image of what the clock looks like. It usually takes a few iterations of running the Serial Generation vi for the error to occur, but it eventually happens.

I've tried various clock frequencies, but that doesn't seem to affect the occurrence of the irregular clock. I'm mostly interested in 128Mhz and 240Mhz.

I don't abort the execution while it is running. I only use the give 'STOP' button.

I found this KB, but I already had the fix, so it was irrelevant.

Any help would be greatly appreciated

[Colonel]

Bump

[Esteban.R]

Hi Colonel

Which OS are you using? Windows 7?

Which version of LabVIEW are you using?

Could you try to add some error indicators in order to try to get any specific error code?

How are you measuring or acquiring that signal clock?

Regards

Esteban R.

[Colonel]

I think I found a solution, but it is kind of hack-ish.

I am able to get a constant stable clock by adding an FPGA 'Download' invoke method and an FPGA 'Run' method at the beginning of the Host Vi. I guess this is forcing the FPGA to do a complete reset even if the FPGA file is the same?

Other information:

Windows 7

Labview 2012

I am able to see the clock because I have an oscilloscope attached to the clock.

[Esteban.R]

Hi Colonel

As long as it works, but if what you want is to reset the FPGA in the invoke node there is also reset option.

Regards

Esteban R.