NI 9215 sampling frequency not achieved

[prova123]

Hi,

I am working with an analog input module NI 9215 on CRIO 9039, using a 40 MHz FPGA base clock. I need to synchronously sample on all the 4 available input channels at 40 kS/s (that is, 1000 ticks for each acquisition period) , which is far below the maximum declared rate (100 kS/s synchronously on each channel); nevertheless, it seems not to be achievable in practice.

I attach a very simple scheme that, if compiled and run from FPGA VI, can only achieve 1068 ticks for acquisition period instead of 1000 required by my application. I also tried similar schemes, but with no success.

Does enybody else get the same result? Could somebody explain me where is the problem?

Thank you!

[MarkCG · Accepted solution]

4 loop timers in one loop makes no sense. Just use one flat sequence structure with ONE loop timer, and instead of using 4 fpga IO nodes use just one- you can expand or grow the node and read all 4 channels from one node. See where that goes