05-09-2022 01:33 PM
I would like to read in an excel file (csv) with four columns of data each with 250,000 INT16 elements in a Host vi and write that data to a FIFO that can then be read by my Target (FPGA) vi. Any thoughts or code snippets to get me started is greatly appreciated.
Thanks,
JJ
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05-09-2022 02:09 PM - edited 05-09-2022 02:10 PM
Hi John,
@johnsoja wrote:
Any thoughts or code snippets to get me started is greatly appreciated.
What have you tried and where are you stuck?
Mind to attach your current project?
@johnsoja wrote:
I would like to read in an excel file (csv) with four columns of data each with 250,000 INT16 elements in a Host vi and write that data to a FIFO that can then be read by my Target (FPGA) vi.
So there are 2 (or 3) problems:
All 3 items are explained in example VIs/projects coming with the example library in LabVIEW! (So I ask again: what have you tried so far?)
05-09-2022 02:17 PM
I haven't started the code yet. I have done numerous projects writing high speed data to a FIFO on the target (FPGA) side, reading it on the Host side, and writing it to disk for post processing.
I have not done any projects going the other direction (File on Host, writing to Host FIFO and picking up on Target side), so was just looking for any basic direction.
Are there specific examples that you can recommend that are tailored to each of the steps I need to take? Even better, do you know of one example that does all of these basic steps in one?
05-09-2022 07:36 PM
Several points regarding your question in the previous Reply:
Bob Schor
05-12-2022 09:21 AM
Thanks for the response. I've done some work on this and have it somewhat working, but need some additional insight. Hopefully I've got it far enough along that it will make sense what I'm trying to accomplish here. I've attached screenshots of a snippet of the relevant host side vi code and the host side data display.
Host to target FIFO size is currently set to 1023 U64 elements.
I start with a tab delimited text file of 4 columns of data as shown in indicator 16bit integer that can be as deep as say 250,000 rows. I massage that data producing a single column array of all of the data points as shown in indicator output array. I then decimate the array and use join numbers to produce a single U64 element that represents one row of the four column data and write each to the FIFO.
This is where I'm not sure where to go. To support large data sets, I need to write into the FIFO in blocks of data that will be small enough to fit. In the example screenshots, this is a very small data file so that Labview would let me run. For large data sets, it obviously complains that the data is larger than the allowable FIFO size. I know I can further increase the FIFO depth, but still not enough to support say 250,000 elements. Thus I need some method to read in smaller chunks at a time. Also, I would like it to only run this writing of the data file contents to the FIFO once. Currently it repeats the writing of the data file over and over again.
I've got the FPGA side working (reading the FIFO and using the data the way that I want on that end).
Any help is greatly appreciated!
JJ
05-14-2022 08:54 PM
I am not going to bother to open the .jpg files -- it will only get me angry and upset (imagine if I was asking you for help on a complex Matlab or C++ program, and attached a picture of a 1000-line printout of my code, instead of attaching the code, itself ...).
Since I don't have code to examine, let me ask some questions and make some observations that might (or might not) be appropriate, as I don't (yet) fully understand what you are trying to accomplish.
Here are my assumptions:
Here are some suggestions. I'm going to assume that you have a file containing 250,000 "samples" that you want to "process as fast as possible" by doing some "transformation" on the data (perhaps some form of filtering, or time-varying FFT, etc.). I'm also going to assume that you can "serially" process your data by dividing it up into blocks of 10,000 "samples" and processing them one at a time, perhaps having two in memory at the same time so that you can "process across the 10,000 sample block boundary". I'm not going to worry about "block transitions" at this point, however ...
For more details, provide more details by attaching LabVIEW Code (files with extension .VI) with enough detail to permit understanding (so TypeDefs and sub-VIs are important, as well). In a pinch, you can compress the folder holding the Project and attach the resulting .ZIP file.
Bob Schor
05-16-2022 05:10 AM
Hi JJ,
A couple of ideas.
1) There are two sides to every FIFO, whatever direction - a host side and an FPGA side. The FPGA side is limited but the the host size resides in host memory so can be grown further. This is done by using the FIFO.Configure method (https://zone.ni.com/reference/en-XX/help/371599P-01/lvfpgahost/fpga_method_fifo_config/). Your full data file is around 500kB so it would be reasonable to just increase the host side to hold all your samples and let the DMA engine manage writing the individual chunks. This assumes a reasonable cap on the data size.
2) If you can't guarantee the maximum size (or want to make it robust against any size) then you will need to create a loop which just takes the next n rows from the data and writes them into the FIFO up to the maximum size. There is no trick to this in LabVIEW - just use array subset to get the current subset and you need to track how far into the array you have gotten.
Repeating depends on more than we can see in the screenshots - if it is in a loop then it will keep writing the file, you need to extract this code from any loops it is in to make it run only once.
05-23-2022 01:31 PM
Bob/James,
Thank you for your responses. For the record, there is some company proprietary data associated with my VIs, which is why I am unable to attach the actual code. I do appreciate your frustration when trying to help without all of the code shown.
As for my setup I'm using, I have a PXIe-1085 chassis with a PXIe-8880 controller running Labview 2017 (Host) with a PXI-7954 RIO FPGA Module Target.
Your understanding of the data file contents and format is correct. It is a 2d array of 4 columns and many rows (minimally 250,000 and could be more). I combine the 4 columns of 16 bit data into a single column of 64 bit for writing to the FIFO on the host side.
The RIO FPGA vi code reads each element from the FIFO data at a 1kHz rate (every 1ms) splits it back into the 4 16 bit words and transmits them over a UART interface, which is also implemented in the FPGA Target vi code. I have the FPGA Target vi code that reads each FIFO element and transmits it over the UART working.
The 250,000 elements are stored in a text file. The goal is that the Host would read in all of the elements in the data file and write them to the FIFO. The Target (FPGA) side would read sequentially each element and transmit each out the UART at 1kHz rate. I'm not doing any processing of the data on the Target side and then sending back to the Host. It's a one way data path : Host to Target via FIFO and out of Target UART to a separate piece of hardware.
I believe my main problem was that I thought I was limited as to how many elements that I could write into the FIFO on the Host side. If I'm interpreting James' response correctly, it seems as though I can write all of my data (250,000 elements for example) to the FIFO on the Host side if I use the FIFO.Configure method. Is that correct? Then the Target side would just read thru the entire FIFO contents element by element at 1kHz transmitting each out the UART? Also, I would like for the Host to just write the entire data file contents into the FIFO once and the Target to read and transmit all of the elements once and then stop. I believe currently it may write the data on the Host side over and over and the Target side would keep reading endlessly. Is there a way to prevent this and only run thru the data file contents once?
Thanks again.
JJ
05-24-2022 01:09 AM
Hi JJ,
Once the target has read all the elements you have written it will just start giving a timeouts so you will just need to handle that case on the target. So I think it should give the behaviour you want by default.
Cheers,
James
05-24-2022 09:11 AM
James,
Thanks so much for your help. My code is now doing exactly what I want. The key enabler was understanding that I could set the host side FIFO to a value much larger than the Target side and of course simply moving the FIFO write on the Host side outside of the while loop.
Thanks again to you and Bob for taking the time to help me out. Much appreciated!
JJ