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Same Input data and same calculation but different result from Simulation and FPGA...

Hello, i am trying to scale output data to speaker. (scaling to Word Length:20 Integer Word Length: 5)

 

I found the scale doesn't work well in FPGA, so I tested with the history data from the FPGA to Simulation (from computer vi).

 

and the simulation worked well. (graph looks similar for both before and after scale)

 

I used same scaling method for both simulation and FPGA with same input data but their results look different.

 

I attached the images of them. You can see that the difference between before scale and after scale for simulation is very small

 

while difference between before scale and after scale for FPGA is huge, and the before and after graphs don't even look similar.

 

How can they be different?

 

(Scaling process: Amplify by 5.7E13 (multiply) --> FXP to 32,16 --> divide by 2^11 to fit it to 20, 5 --> FXP to 20,5)

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You can try using the FPGA Desktop Execution Node, which will allow your simulation to behave more like your FPGA.

 

One key difference is with the "Scale by Power of 2" function. In FPGA, this function will shift the bits of the number you are manipulating and cut off the bits at the end. On Windows, the behavior of this function is different. It could be causing a difference between your simulation and your FPGA results.

 

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