To DFGRAY

[MikkoJ]

Ok. Can you check if there is problem with these VIs. So the problem was that I couldn't control the output voltage with front panels I made in these VIs.  

[DFGray]

I don't have a working FPGA for LV7.1, so these observations are due to inspection of the code.  They could easily be wrong.

There are several potential problems, depending upon what you are trying to accomplish.

1. You don't initialize the shift register input to the timed loop in your threshold detector.  This will result in incorrect behavior the second iteration (and every even iteration thereafter).
2. There is no synchronization between your AI loop and threshold detector.  The threshold detector can easily run several thousand iterations before the AI returns its first point.  If your threshold is above zero, this will not be a problem.
   
3. You have no synchronization between your host and FPGA VIs.  This may be OK.  It depends on what your are trying to do.

However, I don't see any reason you are not getting any output voltage.  Your timing is within the 1MHz capabilites of the 7831R.  I would guess there is a problem in your project somewhere, but I can't check this since all I have is your code.  Alternately, you could be probing the wrong connector/pin.  Finally, you could have a bad cable and/or breakout box, although this is far less likely than the other options.

My apologies for the slow response.  I was out of the office Friday.  In the future, you may want to post with a descriptive title and someone else would probably answer in a more timely manner.