Hello all,
I am attempting to set up a system in which an external part will provide an LVDS clock (and data) to a NI 6587. I would like to use that clock in the NI 6587 as:
- the acquisition clock
- the generation clock
- also export the generation clock on the Inifiniband DDC connector
If I understand correctly, I can accomplish (1) and (2) by connecting my external clock to the STROBE pins on the DDC connector and setting the Acq_Regional_Clk and the Gen_Regional_Clk to come from "Strobe From Crosspoint Switch" or "Strobe Bypass" in my FPGA code.
My first question is: is this a correct understanding of how to utilize an external LVDS clock? Can I use "Strobe From Crosspoint Switch" or "Strobe Bypass" for both Acq and Gen clocks?
I am not sure exactly how to accomplish (2a)--does the Gen_Regional_Clk connect to the DDC_CLK_OUT pins on the DDC front connector? If not, where can I find the Gen_Regional_Clk on the front connector? What do the DDC_CLK_OUT pins do?
Thank you for any assistance,
jppb
PXIe-7966R, NI 6587, LabVIEW 2019 FPGA Module
