While Loop to SCTL

[spalinowy]

Hello everyone

can anyone give me a hint on how to convert the code that is in the attachment and I am using the While loop there into code that will contain SCTL? The problem for me is that I can't use either Wait or Time loop, so I don't know how to make the individual instructions execute for a period of time and not just for 1 Tick.

[GerdW]

Hi spalinowy,

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@spalinowy wrote:

can anyone give me a hint on how to convert the code that is in the attachment and I am using the While loop there into code that will contain SCTL? The problem for me is that I can't use either Wait or Time loop, so I don't know how to make the individual instructions execute for a period of time and not just for 1 Tick.

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Which target should your code run on?

SCTLs are only supported on FPGA…

What exactly do you want to achieve? (We can most often help much better when the question is about "what" and not "how", aka explain the goal, not that way to the goal!)

[spalinowy]

I will try to describe everything in more detail.
Namely, it wants to read data from the IMU via I2C on myRIO FPGA. I already made a program that almost worked, but despite the correct code (as stated by Techsupport NI) the data was not read correctly. Now I need to rewrite the whole thing so that it executes faster, that is, no longer in "us" but in Tick. The problem is that I do not know how to manage the rate of execution of the code be the mentioned functions. The program I attached is to generate a 9-bit frame containing, for example, the address 68+ACK.

[ZYOng]

Why bother writing your own code when there is I2C Express VI in Academic RIO Device Toolkit Express VIs

Even if you don't like the Express VI, there are plenty of I2C IP available.

I2C and SPI communication on FPGA

NI I2C IP Toolkit for LabVIEW

I2C Implementation in LabVIEW FPGA Toolkit for LabVIEW

[spalinowy]

Because I have already found out more than once that packages in LV are supported and then suddenly not anymore. That's why I prefer to make my own library. Besides, I've tested these libraries and they don't give me the configuration options I expect.

[spalinowy]

The attached code in the first message can be executed with SCTL using the State Machine. This one specifically requires 6 Cases, where in each of them there is another Case Structure. False lasts until the switch value is reached through the Add +1 function using Shift Register. As soon as the value is equal to the row, the program will switch to the indicated head Case.

[GerdW]

Hi spalinowy,

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@spalinowy wrote:

The attached code in the first message can be executed with SCTL using the State Machine. This one specifically requires 6 Cases, where in each of them there is another Case Structure. False lasts until the switch value is reached through the Add +1 function using Shift Register. As soon as the value is equal to the row, the program will switch to the indicated head Case.

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I don't know what you are talking about. Why not attach code?

Using a 6-case case structure with even more case structures in each of the 6 cases sounds complicated…

What's the point in setting the same value to those indicators ("1" to "1 6") all the time? The only things that changes is the ".not. x?" indicator…