05-18-2010 06:48 AM
I attached the .vi
05-18-2010 07:33 AM
Argghhh, it's worse than I thought.
I posted the previous post thinking it was a joke. I was right.
You have 4 "MEASUREMENTS" Booleans!! - I think 3 are hiding somewhere in diagram disable structures - I've found 2 of them.
Recommendations
1) Name all controls and indicators something different - If you want to display the same text, change the caption.
2) Your FP is too large to fit on my screen as I don;t have a humungous monitor
3) Your Block diagram is massive, it could do with a tidy up:
a) some docmentation to explain the different bits of code do (that will help you or whoever takes it over from you)
b) some more subVIs to make it smaller and easier to read - e.g. all of the TCP stuff at the top could be in 1 VI with a cluster input.
When you have the Block Diagram smaller, you have a better chance of debugging your code.
- Now I've found which terminal you are getting the update from I'll look at the original question and hopefully post something back to help - It won't be your code as I don't have the Realtime module installed currently I can't get all you code on my screen if I scroll accross 3 times.
James
05-18-2010 08:03 AM
Zaxos - Here is a VI in 2009 to show you what battler meant.
tbob - No extra Locals needed to be added to the block diagram than those already shown.
Dennis - Sorry for assisting in the use of Locals, I'm not advocating them, I'm just trying to help. (I have pointed out the race conditions though.)
James
05-18-2010 08:22 AM
Apologies, I gave credit to battler where it should have gone to Dennis,
couldn't see the quick way to elimintate the local variable in the VI Dennis
Sorry Dennis
James
05-18-2010 08:54 AM
James
this vi does not suit to my application. the output of the XOR gate changes from true to false and reversely every 250ms , at the period when the Measurements boolean is true. I want in that period the, case structure (send sms) to be execute only once, I still don't know if you really understand what I want to do.
By the way thanks all of you for the advices!
Regards
05-18-2010 09:33 AM
The problem in your suggestion is the times that the xor gate is executing because is changing in every interation of the while loop
input in the XOR output(shift register and input of the case structure)
measurements - shift register
0 - 0 0 (Beginning)
1 - 0 1 ( this is when the measurements become true)
1 - 1 0 ( iterations in the while loop when the measuremets is still true)
1 - 0 1 ( iterations in the while loop when the measuremets is still true)
1 - 1 0 //
.
.
.
INPUT A B | OUTPUT A XOR B | |
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |
05-18-2010 10:24 AM
Sorry, Zaxos, I'm being a muppet, just worked perfectly for me due to a timing issue. Here is a revised VI
(comments removed)
Latching now occurs due to corrected Boolean logic
Does this help?
James
05-18-2010 11:00 AM
James
This boolean logic is what I needed
Thank you very much for your help and the time you spend on me for this problem...
Kind Regards
Zack