09-01-2009 09:59 AM
Hi,
I have a cRIO project in which almost all of my modules should operate in scan mode (high density, low sampling requirements etc.), however I have one 9870 module which requires the FPGA interface, so I am trying to get cRIO to work in hybrid mode. I have followed the instructions from the KB article on this subject to no avail. Right now, everything works perfectly if I leave the chasis in scan mode interface, but when I switch to FPGA interface (deploy the change, compile my FPGA vi, download the bitfile, and restart the RT vi) none of my data values are being updated, and it's not just that they are steady, the timestamps on them are all zeros. The RT Get Scan Engine State VI says the scan engine is in Active mode, but yet it is behaving as if it is not. Any suggestions?
Thanks for the help,
Jon
Solved! Go to Solution.
09-01-2009 10:22 AM
09-01-2009 10:23 AM
Hello Jon,
Can you explain your setup in a bit more detail?
When you say download the bitfile do you mean download the bitfile to flash to have it run at startup? Is the FPGA VI set to run at startup?
Does your RT code have an "Open FPGA VI Reference" call in it? If it doesn't, can you try including one?
Are you able to communicate with the 9870 when in hybrid mode?
Thanks,
Sebastian
09-01-2009 10:27 AM
09-01-2009 10:35 AM
That worked. Thank you for your help.
Jon