cRIO precise timing

[none777]

I am using a 9067 cRIO, I have several sections of code that must execute in 2 ms. I have timed each section and together they add up to under the 2 ms requirement. Problem is when running they often take longer than that, there is something running in the background that delays them. I used a timed loop to generate a user event but the user event code mentioned above could not run in the 2 ms window. I disabled my other code and/or disabled calling any other vis so only the 2 ms code is running but get same results. How do I see what processes are running in the background? I am using the JKI state machine so timed loops do not conveniently fit in that state machine. I timed the state machine and it is not the source of the delay. What overhead it running on the cRIO and can I do anything about it?

[GerdW]

Hi none,

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@none777 wrote:

 Problem is when running they often take longer than that, there is something running in the background that delays them.

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On a RT target your code should not take often longer than expected...

Mind to attach code to get better advice?

[crossrulz]

One of my initial thoughts is you are using the Scan Engine and it is set to take longer than 2ms.  Granted, the 2ms scan rate is pushing it.  I don't really recommend the Scan Engine for anything faster than 10ms rates.  If you need faster, you should be using the FPGA interface and DMA FIFOs.

[none777]

That is what I am trying to find - what is running in background. My code started out clean but in debugging I have made it less clean. Will clean it up and post. Thanks for your input, have a Blessed day!

[none777]

I have not used any Scan Engine vis so did not consider that. Looking at the Scan Engine properties the default is 10 s but us is in the drop down menu. Would changing it help? Does it run continuously even if not called by a vi?

I inherited the code which was, well, spaghetti style, put it in JKI state machine format to clean it up. FPGA code is legacy also but I do need to move some time critical functions to it if there is enough room.  The 2ms code was working in the RIO using the spaghetti code! Go figure. State machine overhead is text string manipulation to go to next state so I did not think it was using many clock cycles. Could be wrong.

Funny thing to me is the time varies from 2ms to 3 maybe 3.5 or so ms. I need to find out what is running besides my code. Thanks and have a Blessed day!

[none777]

I checked, not using scan interface but FPGA interface.

[none777 · Accepted solution]

Problem is that the timed loop generating a notification is deterministic but the event structure is not, it will get to the notification whenever it wants. That is causing the variable timing. Solution is to put the 2 ms vis into the timed loop. That means the two loops must share some variables to keep up to date of any changes. This solves my problem.