cRIO stand alone running

[Ximusma]

Hi everybody,

I am beginner in LabVIEW and more about LabVIEW FPGA and RT. Student in intership I work, this month, on FPGA project and my aim is to program a stand alone application on cRIO.

I got a CompactRIO 9002 with a analog input module AIO 9215 and use LabVIEW 13. This cRIO gets an ethernet and a RS323 ports.

My application involves to : - code FPGA by ethernet

                                        - acquire a signal by an input of the NI 9215 module

                                        - send the data measured to a device (in first on to hyperterminal on PC and further on a SD card or any storage device) by the port COM (RS232)

My development was to : 1. create an FPGA Project

                                     2. code a vi for the FPGA target and compile it (InOut.vi)

                                     3. code an other vi to lead the cRIO from my computer (OpenCloseFPGA)

At this step everything is allright and runs and I monitor signal measured on OpenCloseFPGA.vi and on my Pc's Hyperterminal.

Then I follow this topic "http://zone.ni.com/reference/en-XX/help/370622L-01/lvrthowto/rt_building_rt_app/" about building and deploying a stand-alone Real-Time application. But my RT application built and deployed nothing happens. I followed others tutorials about stand-alone RT application but  I still stuck...

Some one could give me advice or tutorials to help me ?

[benoitsimon]

Hi Ximusma,

Can you post your code here ?

If I understood correctly, your application works fine in development mode, but when you build your executable, and you run it on the target, nothing happens. Correct ?

I found two ressources you can read, that will help you in building your application.

LabVIEW RT: http://www.ni.com/white-paper/9988/en/ (Especially lesson 7)

LabVIEW FPGA: http://www.ni.com/white-paper/3555/en/

Regards,

[Ximusma]

Yes, when I run the target with RT application nothing happens, I should receive data from cRIO on my Hyperterminal...

Thanks for your help.

Merci pour votre aide.

Cordialement.

Ximusma

[Ximusma]

Sorry but I can't join the project .lvproj. Is it a problem ?

[benoitsimon]

Hello Ximusma,

Can you zip the folder in which you are working, and attached the file ?

Regards,

[Ximusma]

Hello,

The zip folder. Thanks for your help. Still stuck but I read the two links above, its will help for sure.

Ximusma

[Ximusma]

I maybe found why I get nothing. In the compilation report of FPGA target's code, in the report "configuration" I get "Run when loaded to FPGA : FALSE".

How I can fix it true ?

[Hooovahh]

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@Ximusma wrote:

I maybe found why I get nothing. In the compilation report of FPGA target's code, in the report "configuration" I get "Run when loaded to FPGA : FALSE".

How I can fix it true ?

---

I think this is under the build specifications properties.  But also in the RT side when you open your FPGA reference you can configure it to start when loaded, or even call the Start after opening the reference.

[Ximusma · Accepted solution]

I found the solution, there were one incompatibility and one error in my project.

About the first, I use a cRIO 9002 and in building'step it needs to desable SSE2 option in "Advanced dialog box".

Look this topic.

The second was an error from myself, I give a ethernet adress to the RT Host that can not run in a stand alone application (wireless).

Thanks everybody for your help.