estimation of minimum response time of a PID controlled system

[cli21]

Hi all, 

I have constructed a feedback loop to achieve displacement control, the loop is shown below. 

About the process flow: the displacement sensor converts the displacement of the plant to voltage, this voltage is sampled by NI DAQ USB 6009 analog input channel, and the displacement is compared with setting displacement and then going through a PID controller which is achieved by a labview program, and PID program calculated output voltage is applied to the plant through USB6009 analog output channel.  

About the system properties: 

1. Bode plot of the plant

It has two peak, corresponding frequencies are 11000Hz and 71600Hz.

2. Bode plot of the displacement sensor is similar to a second order low pass filter, the cutoff frequency is 1000Hz.

3. The sampling rate for AI of NI USB6009 is 1000Hz, 

    The iteration rate of the labview PID program is 10ms, 

    The  update rate for AO of NI USB6009 is 150Hz. 

My question is, with all these system properties known, can we give an estimation of the fastest rising time if a setting displacement is set as a step input? It's better certain explanation can be given. 

I don't expect to get a accurate number of the rising time, a rough estimation is enough (maybe the order of the rising time). I have actually tested the rising time, with the P I D parameters I used, the rising time is 60ms which is too large. I am working on reducing this rising time, but I think it would be better if I kind of know what is the best performance I can get with this system. That's why I started this thread here. 

[GerdW]

Hi cli,

3. The sampling rate for AI of NI USB6009 is 1000Hz, 

    The iteration rate of the labview PID program is 10ms, 

    The  update rate for AO of NI USB6009 is 150Hz.

My question is, with all these system properties known, can we give an estimation of the fastest rising time

Your loop is limiting you to 100Hz (10ms), the AO of the USB6009 is limited to a range of 0-5V.

So the "fastest rising time" is given by 5V/10ms = 500V/s.

[cli21]

Hi GerdW, 

I am sorry I didn't make it clear.

The rising time I said is the time it takes for the close loop system to response to a step input. 

I attached the following image as illustration.

 

I would like to reduce the rise time to make it as small as possible. 

The rise time can be changed by using different controller gains P (Kp)  ,I (Ki) , D (Kd). 

I have chosen a set of gains which could lead to a rise time of 60ms, i.e. the controller iterate 6 times to fully respond to a step input. Can this rise time be even smaller? 

If the iteration rate (currently 10ms) can be reduced to 1us, can I reduce the rise time to 6us? If not, what is the limiting factor? the bandwidth of plant, bandwidth of sensor or the update rate of AO of the DAQ?

[GerdW]

Hi cli,

Can this rise time be even smaller? 

Yes. Increase Kp, decrease Ki - and accept some overshoot…

If the iteration rate (currently 10ms) can be reduced to 1us, can I reduce the rise time to 6us?

Probably not: Just increasing the loop iteration rate does not change the bandwidth of all your hardware!

If not, what is the limiting factor? the bandwidth of plant, bandwidth of sensor or the update rate of AO of the DAQ?

All of them.

The plant bandwidth should be the most limiting factor.

Your sensor, PID loop and AO should operate faster (aka "with higher bandwidth") than your plant system.

[cli21]

Hi GerdW, 

Thanks for your reply. 

For my case, the sensor bandwidth is smaller than plant bandwidth and currently I can't find a better replacement of the sensor.Iteration rate and update rate of AO can be improved. 

All of them.

The plant bandwidth should be the most limiting factor.

Since all these factors will influence the rise time, I wonder is there any method that can be used to quantitatively describe the relationship between rise time (or response speed) and these factors? Or an estimation of on what order the rise time can be? 

I have tried to get the transfer funciton of the whole close loop system and use it to simulate the rise time, but I realized the transfer funciton of the PID controller ( Gc(s)=Kp+Ki/s+Kd*s) is an ideal case which didn't consider the sampling rate, and loop time and the AO update rate. Hence I think this method is invalid. 

[Kevin_Price]

I think you're kinda missing the forest for the trees here.

If you're aiming to implement a PID loop that gives you a faster stable step response than 60 msec, you should:

1. not be using a USB device due to the extra latency of the bus

2. use a device with higher resolution (& probably accuracy too) AI and AO

3. run your loop faster than 100 Hz.  In 60 msec your PID loop simply isn't getting many opportunities to observe and adjust.

4. understand that Windows loop timing will not be perfectly consistent.  Real-time would be much preferred, though I understand that it may not be a realistic option due to cost and learning curve time.

All that said, the plot you posted shows an overdamped response.  It's likely that the plant can respond faster if you can tolerate some overshoot.   However, it isn't clear from here whether your control loop rate will let you accomplish both significantly faster response *and* acceptable stability.

It may be helpful for you to capture more than just the position response as a function of time.  For example, you could learn some more things about your system by also studying the relationship of PID output and the derivative of the position response (aka velocity).   I'd suggest you capture this data at a much higher rate than you iterate your control loop.   

If you find that the PID output spends time near the max your system can put out (5V), then there won't be much more you can do.  At that point, you're limited by the plant bandwidth.  But if the PID output never gets near its max, you can probably improve on the rise time (though again, you may be trading off rise time against stability).

-Kevin P