07-22-2009 05:33 AM
Hello everybody,
I am new to the Labview Fpga and Compact RIo,but i know labview very well.My problem is with data acquisition and streaming to RT controller of CRIO.
I am using CRIO with 9014 controller and 9104 FPGA Chassis with NI 9205 analog input module.I want to know how to do that.I havent started to program,but my thought is to use the DMA FIFO in FPGA.In fact i know how to use the DMA FIFO.But my problem is with the programming in labview FPGA.As i thought is just i need to place a while loop in labview FPGA vi with a loop timeer and i need to create a FIFO with some depth.Then i need to place a rt vi and from there i need to read from the DMA FIFO.Ok so far so good.But the problem is how to sysnchronise the loops?How much depth i should give for queue?
How much loop timer value i should give for the FPGA Vi and how much loop rate i should give for the RT Vi?
Can we define the sampling rate of analog input from FPGA Vi?I am using a signal generator which will generate a sine of 5hz to 125khz.My labview version is 8.5.1.
Please anybody give me details or atleast suggest any tutorial for me....
Thanks and regards,
srikrishna.J
Neurofocus Inc.
07-22-2009 08:22 AM
Before attempting to answer your question, have you looked at the examples shipped with the LabVIEW FPGA module? If you open up Example Finder (Help -> Find Examples), you will an entire project setup dedicated to communication between RT and FPGA using DMA FIFOs. Have a look there. Depending on the sort of data you are sampling, you need to set the loop timers. Also, there are ways in which you can read all elements that exist in the FIFO from the RT side and using a Producer/Consumer architecture, work on the data later on.
You can setup different clock rates of the FPGA depending on the code you are working with. The default clock rate is 40MHz. You can derieve another clock rate by right-clicking on the clock in the LabVIEW project.
Be sure to have a look at the examples and if you have any questions after that, please don't hesitate to post back.