10-28-2024 05:11 AM
Could you explain better what you do in this VI?
10-28-2024 11:07 AM - edited 10-28-2024 03:22 PM
@angelo.iaconoquarantino wrote:
Could you explain better what you do in this VI?
It is the same code as before, but now we simulate a sine signal forever. You can use your "simulate signal" before the loop, extract the Y array and autoindex at the loop boundary instead.
You can hover over every function and get the help page, there is really not much more to explain.
If you want to add noise to each point, you could just add gaussian noise (e.g. using Box-Muller).
Do you understand the algorithm itself?
10-30-2024 05:30 AM
I was trying to input a sinusoidal signal to understand how the VI you sent me behaved.
I wanted to point out that I would like to see a behavior of the modulator output of this type. I attach an image of a noise shaping.
Could you give me a VI that does delta modulation and that results in frequency as in the following image??
10-30-2024 11:53 AM
In this case you need an outer loop to sweep over the desired frequency range and repeat the measurement. Use a logarithmic frequency ramp and change the x axis to logarithmic.
This has nothing directly to do with delta-sigma modulation, just a characterization of the frequency response of a generic system that can be considered a black box for this purpose.
11-02-2024 06:51 AM
ok ok, I understand, however, I wanted to ask you if there was a way, as your VI did, to be able to increase the order of the sigma delta, that is, add another integration step, in such a way as to improve SNR even more and SINAD
11-02-2024 10:13 AM
@angelo.iaconoquarantino wrote:
ok ok, I understand, however, I wanted to ask you if there was a way, as your VI did, to be able to increase the order of the sigma delta, that is, add another integration step, in such a way as to improve SNR even more and SINAD
I don't know what you mean by "Order", or "integration step" but you can easily increase the number of booleans to more that 64 (But the the integer solutions would get a bit more complicated, e.g. with a bit more work, you could substitute a U8 array for 8 bits per element). You could use a pybypt filter, but that might cause a slight phase shift.
11-12-2024 08:51 PM
perhaps with this image the situation is clearer...
I want to create this sigma delta adc with two integrators, on labview do you have any ideas on how to do it?? give me advice
11-14-2024 05:19 AM
LabVIEW is a programming language, not a circuit simulator.
11-14-2024 05:30 AM
Yes, I understand, I'm asking you if it's possible with LabView to simulate with the blocks it provides, build such a circuit, which would be a second order sigma delta
11-14-2024 05:51 AM
Yes, you just need to implement the math, similar to what I already did.