"Should be simple" counter question

[GregFreeman]

So I have a VI like the one below where I want to build multiple 100 element arrays. However, I want to start taking 100 points of data at different offsets. Once I have my 100 points in the first case structure, I want to reset my counter so in the first case structure I start taking data again. But then because of the offset, the other case structures haven't built their 100 point arrays yet so I want them to continue taking data for another 20, or 40 points respectively despite the counter being reset to 0. I am trying to avoid a bunch of parallel loops of a bunch of different counters since I will have more than 3 offsets so that's why I'm trying to do it this way. Any suggestions on how I can relate my counter to the different cases in a way that will allow me to do this?

Sorry that was a bit wordy let me know if anything is unclear.

 

[Darin.K]

This looks like a job for the Feedback Node.

[GregFreeman]

People actually understand how those work? . I should have added, this is on FPGA...will feedback nodes still work? Also, how do i set the 20/40?

[Darin.K]

I have some vague recollection that these things were built with FPGA in mind.  Can't tell you myself, I don't do FPGA.

[GregFreeman]

Sorry, editted my above post after your response so I'll post again, how do you add 20/40?

[Darin.K]

Right-Click the FN, and select Properties.  The delay is on the configuration page.  I have also reversed the direction.

[GregFreeman]

Uh oh....so i just realized I can't set the delay programmatically (I don't think) and there are times it will need to be changed..NOW WHAT? May need to resort to shift registers somehow

[Donovan_B]

If you are using the LabVIEW 2010 FPGA Module, there is a function on the High-Throughput Math»Basic Elements palette called Discrete Delay.  If you double-click, under Delay Settings you can specify a dynamic delay and a maximum value possible for the delay.  Then, you can programmatically change the delay for each node.

[GregFreeman]

I don't see it in high throughput math but I do have an express VI called discrete delay in another palette. Same thing?

[Darin.K]

My all means use the FPGA VIs if you have them.  You could also do this, the Integer Quotient is negative until the offset is reached.