triggering PXI-7831R from PXI-4472

[graduate student 44]

my pxi-1006 chasis contains several pxi-4472 cards, one of which being the master card and it triggers the rest slave cards. i rerouted so that they all share the same onboard clock. i also routed "AI trigger" to "RTSI0" on the master card and make the slave cards listen to "RTSI0" so that they acquire data synchronously.

Now on the same chasis i have a pxi-7831R card. i wonder what can i do to make it listen to the same triggering signal from the master card? i plan to use fpga's internal clock and need to take a timestamp whenever a data point is taken on the master and slave cards. i'm running labview 7.1 and have both RT and FPGA installed.

[Christian_L]

If the trigger signal is shared from the master on RTSI0, you simply monitor that RTSI line using the Digital Input node in LabVIEW FPGA. Reading the state of the RTSI line is the same as reading the state of an external digital input.

In your LV FPGA code you can either wait for a rising or falling edge on the RTSI line, or compare consecutive values to detect an edge, at which time you take the time stamp.

Christian L
NI Consulting Services

[graduate student 44]

thanks Christian! that's promising.

so i coded the FPGA code so that it listens for a rising edge at port PXI/TRIG0 and output a timestamp once every 16000 triggers (the master and slave cards sample at 32000hz and i need a time stamp every half second). somehow this doesn't seem to work!

the master routes "AI Trigger" to RTSI0. the code for data acq runs fine, so there is definitely triggering signal sent to RTSI0. i'm attaching the vi in case you want to take a look. Thanks a lot!

[Christian_L]

I also just noticed that you are using the 18-slot PXI-1006 chassis. This will require special configuration to route the RTSI trigger signals. Please review the information in this article and make the necessary configuration.

Christian L