pattern match & delay

[SMG123]

Hi,

I am having a problem using pattern match to compare two bit patterns, and do a bit error rate test.

I am using a PXIe-6536 to generate and send a bit pattern, and I want to use PXI-6551 to compare this bit pattern with a known bit pattern loaded into PXI-6551. The 6536 sends clock and data. I think the connection between the cards are correct. The sample clock rate is 2 KHz.

For the acqusition sesson I use the function niHSDIO_ConfigurePatternMatchStartTriggerU32. With this function the error rate test is correct when the bit pattern sent is correct. But this does not work properly when there are bit errors in the pattern.

When I try to add a delay (niHSDIO_ConfigureDataPositionDelay, got a tip to use this), I only get an error message:

Unknown status code

Property: DI.DataPos

Corresponding Vaule: Delay from Sample Clock Rising Edge

Sample Rate: 2.0e3

Minimum Supported Value: 25.0e6

Device: PXI_6551_1

Status Code: -200381

Isn't it possible to use this function with a sample rate lower than 25 MHz ?? How can I work around this problem?

My acqusition session is attached.

Thanks.

[Ryan_M]

SMG,

The 6551 does not support data delay at frequencies below 25MHz.  However, you can use data position to instead sample on the falling edge of the strobe clock.

[SMG123]

Thanks, but I can't see any difference on my system by doing that. Could you explain it more explicitly how that will work?

And it seem like the pattern match trigger continues to look for pattern match after finding the first match. Is this correct? I want it to find the first pattern match, and then start to compare all the other bit patterns independent of match or not..

Is there any way to make the pattern match trigger stop after just one match?