Clocking hardware DO on PXI-6259

[NickDngc]

I'm having a problem selecting a clock for the PXI-6259. I've seen several forum posts on this issue, but the solution seems to be "read the manual"; I'm not able to piece it out.

I have a chassis with a 6723 static analog out card and a 6259 multifunction DAQ. I need to provide 4 sets of 2 digital inputs: a direction line and a pulse line. The user selects a number of pulses, a pulse width, and a destination for the pulse train. I use the number of pulses and pulse width to set up a clocked digital waveform. I then write the direction the static DO on the 6723 and the pulse train to the HW timed DO on the 6259.

My problem is selecting a clock for the pulse train. I've tried using both the AO Sample Clock and the AI Sample Clock to give me the ability to adjust the pulsewidth. I add the extra sample for the "Wait Until Done.vi", but it times out whenever either of these clocks are used. If I use the 100kHz timebase, the vi works fine -- but only for a 10us pulse. Using the timebase destroys my ability to modify the pulse width.

I've attached the vis below; it would only let me attach three.

The parent vi -- Tach Control, Full.vi

The pulse task creation vi -- Create Pulse Channels.vi

The output vi -- Generate Tach Pulse.vi

The RWA Selector is a typedef that selects one of four outputs to send the direction signal and pulse train to.

The Direction typedef is converted to a Boolean value for writing to the direction input.

First I create an array of tasks for the static DO on the 6723 card, one channel per task.

Then I create an array of tasks for the pulse DO on the 6259 card, including setting up the clock. I do this by taking the desired number of pulses, doubling it (each pulse takes two samples), and then adding one to allow the pulse to settle. I also add another sample on top of this for the "Wait Until Done" vi. This is the vi where I select which clock to use.

I then choose one pulse task and one direction task, Write the values to the buffer, and explicitly start the tasks. After Wait Until Done returns, I stop the tasks.

The Wait Until Done times out (I've used up to 10s) if the AO or AI Sample Clock is used. If I remove the Wait Until Done, I get a warning (task may have stopped before all samples written) with no output pulse train. It works fine with a 100kHz timebase, but of course its fixed and can't do any other sample rate other than 100kHz/10us.

I have three questions:

1. Main problem -- what am I doing wrong with the clocks?

2. I put the program in a While loop to allow sending to any of the 4 outputs. I can send Reverse or Forward pulses to the same output any number of times, but the VI throws an error if I try to switch to another output (the unit is shut down, so I don't have the exact error code; it tells me that the task is reserved).

3. Is it necessary to replace the task in the array when I've finished with it (i.e., the Replace Array Subset code)? What exactly is contained in the Task wire?

[NickDngc]

Also -- I tried the NI Example "Write Dig Chan - Ext Clock.vi" on the system. It didn't work for AO Sample Clock or AI Sample Clock either; it just timed out. I did just notice, however, that this example does NOT include an extra pulse for Wait Until Done.

Here are the other VIs and typedefs for the previous post.

[NickDngc]

I figured out the answer to #2 -- since I created 4 tasks that all use the same clock source, starting any one task reserves that clock source. Stopping the task doesn't free the resource automatically; I have to explicitly call Control Task with the input set to "unreserve".

Still can't make my code (or the example code) work with AO or AI Sample Clock.

[Trey_C]

Hi Nick,

I don't think I understand why you are trying to use the AI/AO sample clocks in order to adjust the pulse width.  If you open up the Gen Dig Pulse Train-Continuous.VI located in the example finder under Hardware Input and Output » DAQmx » Generating Digital Pulses then you should notice in the block diagram you can adjust the frequency and duty cycle in order to modify the pulse width.  I believe this may be more along the lines of what you are trying to accomplish.

As far as question 3 goes - I put an indicator on the count of the for loop and found that it iterates 4 times whether or not you use the Replace Array Subset function.  Based on this observation, it appears that all 4 channels are going to be cleared whether you use the replace array subset function or not.

Good luck with your project!

Regards,

Trey C.

[NickDngc]

Thanks for the response.

The counters will most likely be wired to other inputs in the future, so I'd like to avoid using them if possible.

The documentation specifies that the AO and AI sample clocks can be used as DO clocks, so I'd like to figure out how to use them.

So the tasks don't have any information that needs to be updated between iterations that would require replacing the item in the array and using shift registers?

[Trey_C]

Nick,

If you want to use the AI or AO sample clocks then I believe you need to have an AI/AO task running so that the sample clock is active.  Otherwise your program would time out because the sample clock isn't actually producing a timebase.  

Regards,

Trey C.

[NickDngc]

I tried this by creating an analog task for an unused analog input on the PXI card and starting the task immediately. Didn't help -- still get a timeout.

I rewrote the vi to streamline it a bit; it only creates one set of tasks at a time. It still works with the 100kHz timebase and 10us pulsewidth, but nothing else works.

[Trey_C]

Nick,

I took a look through your code and I noticed that you are trying to use the AO sample clock but you created an AI task.  Since there are separate sample clocks for AO and AI, I believe you will want to use the AI sample clock for your AI task.  I don't have the hardware set up but with these changes, I ran your project with simulated hardware without a timeout with either your original setup or my modifications which definitely leads me to believe that the reason you are seeing the timeout is the sample clock wasn't being initialized.  The reason I say this is because in simulated hardware, the clock is constantly 'running' regardless of whether a task exists or not.  I hope this helps!

Regards,

Trey C.

[NickDngc]

The AO Sample Clk was the last one I tried; the AI Sample Clk didn't work either. I'm also checking it out against a simulated configuration on my laptop, and it works fine; as soon as I go to the actual setup, I get a timeout.

[NickDngc · Accepted solution]

Had some extended time to test today, and I found a solution. It's significantly more complicated than the example suggests, although it seem obvious once I write it down.

It takes two tasks and two timing nodes to accomplish the hardware-timed digital generation:

One task and timing node for the digital task, which I had set up already

One task and timing node for an analog task to enable the sample clock. I needed an analog task with an unused channel AND a timing node. The analog timing node should have same sample rate and # of samples as the digital timing node, but the source input should be left blank to use the default clock (AI Sample Clock for a dummy analog input channel).

Smooth sailing after that. Thanks for the help and the insight!

-Nick