02-08-2016 09:57 AM
I need to significantly increase the input impedance on the IO lines while maintaining rise and fall times. I was thinking of adding 1-2 meg ohm resistors in series with the IO lines on the breakout boad, but if the parasitic capacitance on the PXIe-6535 is too high, I would be forced to a lower sampling rate, due to the charge/discharge time.
Or is there a way to make the 6535 completely "let go" of an IO line? Tri-stating forms a resistor divider when an IO line has an external 20k pull up. I need the PXIe-6535 to drive some IO lines that have very high-value pull ups with open-drain.
02-09-2016 03:07 PM
Hey CurtisHx!
It looks like you may have posted this question on the wrong board for the product type. If you repost this question to the Digital I/O board, you are more likely to receive help from the community members that are familiar with the high speed DIO cards!
02-10-2016 06:57 AM
I was under the impression that the PXIe-6535 was classified as a DAQ card since it uses the .NET DAQmx library. Let that be a lesson in making assumptions......
02-11-2016 03:27 AM
The most important information(s) are missing!
Needed timing resolution ?
If you need ns high speed you need matched impedances (and these are usually low impedances 50 Ohm to 100 Ohm ... and a meter cable is about 5ns 😉 )
So: What do you want to measure? Source ? Impedances?
(one solution migth be a 'simple' DIY FET probe adapted to DC ... atually a FET voltage follower )
here is an AC version .... but you would need to adapt it to DC and match the impedances to a DI ... (wasn't that 100 Ohm? Than a twisted cable pair (Cat-cable) should fit)
http://teledynelecroy.com/doc/probes-probing