PCI NI 5122 - External Clock - extended elapsed time to capture

[LTXC_Mike]

Hello, I use PCI 5122 Digitizer with an external digital 1MHz clock. I use niScope_ConfigureClock statement in my C++ code to setup the external clock.

I use the digitizer for a time critical test program (target for total test time <500ms).

I discovered an extended capture time for 4096 samples from 16ms to ~700ms when the external clock is not running as a continous signal. Please note, it's mandatory to switch of external resources after each test run thus disconnecting the external clock going into the digitizer.

Is there an explanation for this extended capture time or did I something miss in the setup? Is there a workaround to get rid of this time overhead?

[Pixar]

Hi

I do not really understand your problem because that is exactly what you want if you are using an external clock.

If the external clock (used as sample clock) is running faster you acquire fast, if slow you acquire less samples.

So for an amount of 4096 samples the capture time will be different if the external sample clock is not constant because with every peak of the clock you acquire one sample. So you can calculate it on your own.

Kind regards

Pixar

[LTXC_Mike]

Hi,

you are right in case the sample clock is slower.

I miss to mention that I switch from an internal 1MHz sample clock to the external 1 MHz sample due to "coherent sampling" i.e. keeping the same capture speed.

//NI horizontal setup: Fs=1MHz, N=4096, numRecords = 1

NI_Digitizer_ConfigureHorizontalTiming (vi[0], 1.0e6, 4096 , refPos, numRecords,NISCOPE_VAL_TRUE); //Fs=1MHz, N=4096, numRecords = 1

//Internal clock:

NI_Digitizer_ConfigureClock(vi[0],NISCOPE_VAL_NO_SOURCE,NISCOPE_VAL_NO_SOURCE,NISCOPE_VAL_NO_SOURCE,false);

//External clock:

NI_Digitizer_ConfigureClock(vi[0],NISCOPE_VAL_CLK_IN,NISCOPE_VAL_NO_SOURCE,NISCOPE_VAL_NO_SOURCE,NISCOPE_VAL_FALSE);

NI_Digitizer_SetAttributeViReal64 (vi[0], VI_NULL,NISCOPE_ATTR_REF_CLK_RATE, 1.0e6); //1MHz is the pll frequency

Do I miss a statement?

Regarding the 700ms, this is additional time consumed by the NI_read command in case the external clock is not running continously:

Example:

enable external clock

setup NI digitizer

read / capture data

disable external clock //if the external clock runs continously, read command will be executed within <20ms

Could it be that the PLL sync circuit need this lengthy time to syncronize with the external clock?

[Pixar]

Hi

Problem is imho that you are not inside the specifications for the PLL.

http://www.ni.com/pdf/manuals/371172m.pdf  -> Page 15

Please look to the +/- 50 ppm of the Phase-Locked Loop (PLL) Reference Clock frequency range.

Here we spec the Duty Cycle Tolerance of 45 to 55 %. This means that the external clock cannot have a high or low time shorter than 45 % or longer than 55 % of the expected frequency.

For example if we setup to input a 10 MHz external clock, than the period/cycle should be 10 ns. If the supplied external clock has any period with a high or low time outside of the 4.5 to 5.5 ns range, the clock cannot be used.

Kind regards

Pixar

[LTXC_Mike]

Hi,

thank you for pointing to the PLL specs. I was wondering if my external clock fail the specs. This is why I used an external HP33120A at 1MHz (1Vpp) instead of my external clock resource but I got the same extended read time. I also checked for a DAQMX error msg - no error reported.