11-12-2007 01:04 AM
11-12-2007 04:42 PM - edited 11-12-2007 04:43 PM
11-12-2007 05:39 PM
Thanks, Paul. I have read those examples before, but when thinking about our project, I still have no idea.
Generally, we just want to inject a set of 0's and 1's in digital logic one by one into our DTI port of scan-chain. So I think the rate is not so important, we just want to make sure that before we get our chip on power, each register in the scan-chain is set to an appropriate state. We need not use analog port, and we plan to use digital output to generate two non-overlap clock to sample. I think if we can creat an array of 0's and 1's and input this array and the clocks to a specific port, it will be OK. However, we have not found out how to generate a series of logic signals (up to 500 bits) and two clocks by LabVIEW. Could you give us more help on this? Thanks!
-Tao
11-13-2007 02:54 PM - edited 11-13-2007 02:56 PM
11-13-2007 10:09 PM - edited 11-13-2007 10:09 PM
Thanks, Paul. We are planning to use software timing to time the digital output non-overlap clocks (use LabVIEW and USB 6008), and the link you provide exactly describe what we want to realize. We won't use external circuits to generate clocks. We can accept low speeds, we just need to inject the set of 0's and 1's into our scan-chain before test.
I see your LabVIEW block, it's very helpful. Thanks again. But we still need two non-overlap clocks to sample it. Is there any functional blocks in LabVIEW to create some pulse signals whose duty cycle are less than 0.5?
11-14-2007 01:31 PM - edited 11-14-2007 01:36 PM
11-16-2007 12:54 AM
11-16-2007 11:45 AM
11-16-2007 03:24 PM - edited 11-16-2007 03:31 PM
11-18-2007 05:20 PM - edited 11-18-2007 05:22 PM