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niHSDIO Dynamic Generation and Acquisition using LV Configure Trigger VI

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Good morning!

 

My experience is limited within the digital programming environment; nevertheless, I have been working on this issue for a couple of days and would appreciate some feedback if possible.

 

I am simply trying to generate and acquire an 8 MHz 50% duty cycle TTL pulse train on one DIO pin of the PCI-6541, and acquire back the signal on another DIO pin. I have a mating connector to the VHDCI 6541 on-board connector which obviously has the DIO generating and acquisition pins soldered to provide a loopback effect.

 

In short, I am using the niHSDIO Configure Trigger VI (instance--> Start Trig: SW), niHSDIO Send Software Edge Trigger VI, and Write Named Waveform VI (instance--> Data: 1D U32) in the generation section. For the acquisition section, in short, I am using the niHSDIO Fetch Waveform VI (instance--> Single Record: WDT).

 

I am seeing results in the acquired waveform showing the generated and acquired digital TTL pulse train on the respective DIO pins, but I can't seem to obtain my frequency requirement of 8 MHz. Also, the lower the DIO pin allocation, the higher the frequency. Unfortunately, due to system requirements, I am bounded to pin DIO 12 for the digital pulse generation. Even with a clock rate of 50 MHz, I'm getting ~6 kHz max frequency acquired. I looked into changing the parameters of the Write Named Waveform VI, but it's not possible since the VI calls a library function node. I also tried generating an 8 MHz waveform via a Digital Pattern Generator VI, but I don't believe you can trigger on generated waveforms? It appears that you have to generate the data by using a simple For Loop as a counter and sending the output to the Write Named Waveform VI. Is there other possible ways I can simply generate and acquire an 8 MHz TTL digital signal (no external connections)?

 

At any rate, any type of feedback would be greatly appreciated.

 

Thanks in advance for your time.

 

dan

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Dan,

 

It sounds like you're using a counter pattern to generate the pulse train.  With a counter, the LSB (channel 0) is going to toggle every clock cycle.  At 50MHz sample rate, you would see 25MHz.  On channel one, it would toggle every other cycle so you would see 12.5MHz.  Extending this to IO12 (?) and you're down in the kHz frequency.  Instead, try creating a toggle pattern in LabVIEW.  I like to create the by first initializing two arrays of half your desired length.  One array initiallized to 0xFFFFFFFF and the other to 0x0.  I'll then interleave the two together which creates an array twice the length with every other sample 0, F, 0, F, etc.  At 50MHz, you would then see 25MHz toggle pattern on each channel.

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Hey Ryan!

 

That sounds like the right path to the solution. The problem I might anticipate is that the niHSDIO Write Named Waveform VI accepts 1D (or waveform) data, since I have to feed the data to this particular VI for triggering assertation. And this particuliar VI calls a library function node, so its parameters can not be changed.

 

I think your suggestion generates 2D data, unless you mean by interleaving the two together creates an array twice the length, which is what you suggest, and this creates a 1D array?

 

Thanks a lot!

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Hey Ryan!

 

I created your idea in my top level VI and it's good. I need to try it out in the lab next where the PCI-6541 exists.

 

Thank you very much!

 

ps: i don't see the "Accept as Solution" click box after my last reply, i'll have to look into.

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Hi Ryan!

 

I interleaved two initialized arrays and connected them to the Data port of the niHSDIO Write Named Waveform VI. I tried it in the lab and I'm not obtaining any acquired signal through my acquisition chain as I was when I had a "counter (For Loop)" connected to the Data port.

 

I think perhaps the niHSDIO Write Named Waveform VI is designed to receive a "counter" stream at its Data port. I can't access the internal parameters/attributes of the niHSDIO Write Named Waveform VI since it is mainly "governed" by a library function node (DLL). Do you know of another VI which will transfer waveform data from PC memory to onboard memory, since I believe this what needs to be done in order to permit triggering action? And then I could implement your interleaved array idea and attain my frequency objective.

 

Thanks again!

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Dan,

 

The write vi is the correct one to be using.  All that vi does is download either a 1D array of U32/16/8 or a digital waveeform datatype into memory and gives it a name.  There is no trigger information stored with the waveform.  Instead, you need to use some of the trigger vi's to create whatever trigger or events you need.  I'm not sure what your end goal is so I'll just refer you to the trigger and event section of the user manuals.

 

<Start Menu>\Programs\National Instruments\NI-HSDIO\Documentation\NI Digital Waveform Generator-Analyzer Help

 

Under Fundamentals section you'll see a Digital Terminology>>Timing and Triggering section. 

 

There's information on the various triggers and events that may be configured.  Additionally there are several examples shipped with LabVIEW that illustrate triggering options including scripted marker events.

 

If these aren't sufficient, please post some more information regarding your application so we can make some recommendations to get you going.

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Hey Ryan!

 

Yes ok I suspected this was the right VI (no pun intended with write:)). It is understood that there is no trigger information built into this VI. Find attached two VIs I've developed initially based on the LV HSDIO examples. (FYI, I generated a new post on this board this morning with those VIs). The "Counter" VI works, but I will not attain my frequency requirement of 8 MHz, for which led me to my second VI ("InterleavedArrays") in which I implemented your initial idea of generating a toggle pattern, which is the right idea, but for the moment does not work. I suspect the niHSDIO Write Named Waveform VI is designed to receive a counter pattern at its Data port? I can't delve into the specific construction of this VI since it implements a Call Library Function Node (DLL).

 

Also, I'm finding that if I use the Waveform data instance of niHSDIO Write Named Waveform VI (which would simplify my efforts since I could just generate a toggle waveform with the right parameters), I can't seem to be able to use the triggering mechanisms of the user-callable VIs available for HSDIO...maybe cause the waveform data instance of the Write VI is contiguous data of some sort (basically a file) and you can't trigger from this obviously?

 

My application is basically to create a digital signal loopback. I want to simply generate a 50% duty cycle 8 MHz 20-period TTL pulse train from pin/channel DIO 12, transmit that through a DUT, and verify the acquisition on pin/channel DIO 5 to analyze signal continuity and integrity. Of course the DUT provides a path for the generated/transmitted signal from the HSDIO to be physically looped back to the HSDIO instrument.

 

Thank you for your efforts!

 

dan

 

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Dan,

 

In response to your specific question, the write vi is not designed to receive only a counter pattern.  In fact it doesn't care whats in the data pattern since its all just bits stored in DRAM on the 6541.  Additionally, there's no hardware difference between the waveform datatype and the U32.  The only difference is how it is exposed in LabVIEW.  Behind the scenes, the waveform data type is converted to a U32 so there is no difference in how the two are stored into the memory on the 6541.

 

Now, regarding your attached code.  You'll notice in your interleaved example, you create two arrays of 10 elements.  One with 0xF data and one with 0x0 data.  The result of the interleaved array would then be a 20 sample array with points 0xF, 0x0, 0xF ...  Since 0xF is represented as 0b1111, you're actually only going to get a toggle pattern on channels 0 to 3 (provided that they're in your channel list).  Each bit position in the U32 corresponds to a channel.  Bit 0 is channel 0, bit 12 is channel 12, and so forth.   If you want to toggle on all channels, you need to create a pattern with 0xFFFFFFFF to get all 32 channels.

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Hey Ryan!

 

That is great infomation on the intricacies of the 6541.

 

Pardon my digital working inexperience, but what is the significance/representation of the "0" in 0xF? I can't seem to find this particular syntax in any of the help documentation. I'm still somewhat knowledgeable as I know that "F" is the hexadecimal representation of decimal 15, & binary 1111 (2^3 + 2^2 + 2^1 + 2^0 = 15). Each bit represents a channel, and I understand that FFFF = 1111 1111 1111 1111 = 16 channels with channel 0 (LSB) being the farthest to the right. I'm just trying for the moment to tie it all together with the interleaving array & the Write VI.

 

FYI, I will try some new code (taking into account your responses) in the lab at end of day.

 

Thank you very much for your support!

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Dan,

 

Sorry about the nomenclature.  I have the habit of using 0x or 0b for indication of radix, its not necessarily any sort of standard, just what I used in my old assembly days.

 

It sounds like you have a grasp on the data.  Fundamentally the hardware is just saving into DRAM an array of 32 bit words with each bit corresponding to a data channel and each element being generated at the sample clock rate you input to your vi.  Everything else is just ease of use or data manipulation.  The interleaving method is just how I like to create a toggle pattern.  You could easily do it in a for loop with an inverter and feedback node, or use on of the built in signal generation vis.  Additionally you can use the digital waveform editor or the test panel to generate count or toggle patterns.

 

Give us an update when you get into the lab and let us know if you run into any other trouble.

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