08-05-2010 08:46 PM
The Xilinx IP provides a friendly wizard interface to integrate IPs of Xilinx to LabVIEW and enables users to cycle accurately simulate the IP within the LabVIEW execution environment. This thread is intended to foster discussion about the project. Please post your questions, suggestions and applications here. Our team including R&D, marketing, and support will actively monitor this discussion.
Thanks
05-06-2011 04:13 AM
Hello, I've just installed the Xilinx IP following your procedure and I do not see the new menu with the Xilinx VIs.
Thanks
ps: I tried to insert a print screen but I get an 'unexpected error' when I try to insert an image.
05-18-2011 03:33 AM
Has anyone ever used this?
05-24-2011 05:25 AM
Hi Luiz
The Palette only displays when targetting a VIRTEX-5 FPGA. The main part of the Xilinx IP is not supported on Virtex-2 or Spartan target and therefore the palette is not displayed.
05-24-2011 06:46 AM
Ok, you should've said that on the welcome message, so, first suggestion Virtex-II support...
07-08-2011 08:49 AM
Hi, I'm very interested in utilizing the Xilinx IP for performing some single-precision floating point math on a cRIO FPGA. Do you have any examples of using the Xilinx FFT IP?
07-18-2011 07:30 AM
Hello gregopher, your application seems to be quite specific so I'd advise you to generate the IPs yourself as you're relying on single precision floating point.
Here's something that may help you: http://zone.ni.com/devzone/cda/tut/p/id/7444
Good luck,
Luiz.
01-05-2013 11:35 AM
Hi Glider pilot
There is available a Xilinx core lib to use with the target NI-sbRIO 9631??
Thx
01-14-2013 07:24 AM
Hello Bern_ ,
Are you using LabVIEW 2010 or a later version?
In later versions This Xilinx CoreGen IP Palette graduated NILabs so it should be directly available in the FPGA palette (if supported).
I just checked at my side and for the 9631 (Spartan 3 FPGA) it is not available in LabVIEW 2012 (the version running on my pc).
However, you should still be able to use existing IP from ni.com/ipnet .
(For 9636 (Spartan 6 FPGA) it is directly available)
Can you give me some extra information about what you're trying to do?
Thanks in advance!