Scan Engine & EtherCAT Custom Device Feedback

[MaximeD]

Hi Devin and Stephen,

I am wondering if it is possible to use my local compactRIO chassis in FPGA mode while using EtherCAT and Scan Engine Custom Device to have an etherCAT chassis in scan mode.

This way I could use XNET+ Custom FPGA on my cRIO chassis while running scan engine for other modules on an EtherCAT chassis.

I am actually trying to do this and I get errors, but I do not know if it is normal or not.

Thank you,

Maxime

[StephenB]

Yes you should be able to do that. I have done it before. Can you tell me about the errors and your system definition settings?

I don't recall entirelly... but I think you want:

• the controller page setting as "scan mode"
• On the scan mode and ethercat custom device, uncheck the synchonize check box
• the chassis page, set the FPGA as the timing master
• the controller page, set timing as automatic

[MaximeD]

I had a few "mismatch between the modules" and "unknown errors" when trying deploying my system definition file before your answer.

I think it occured because my controller and chassis parameters were wrong. Plus my bitfile was wrong as well...

Now I checked everything and I am trying to deploy the good system definition file (with the parameters indicated in your post), but I get another error :

• Loading System Definition file: D:\Documents and Settings\All Users\Documents\National Instruments\NI VeriStand 2011\Projects\My Project\My Project.nivssdf

• Initializing TCP subsystem...

• Starting TCP Loops...

• Connection established with target PC RT.

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

The VeriStand Gateway encountered an error while deploying the System Definition file.

Details:

Error -307853 occurred at Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> NI_VS Workspace ExecutionAPI.lvlib:NI VeriStand - Connect to System.vi

Possible reason(s):

NI VeriStand:  The VeriStand Gateway was unable to establish a connection with the target. Confirm that the target is running and that the VeriStand Engine successfully has started.

=========================

NI VeriStand:  Server TCP Interface.lvlib:TCP Connection Manager.vi:1

<append>=========================

NI VeriStand:  Error 63 occurred at TCP Open Connection in Server TCP Interface.lvlib:TCP Connection Manager.vi:1

Possible reason(s):

LabVIEW:  The network connection was refused by the server.

=========================

LabVIEW:  Serial port receive buffer overflow.

Target: 169.254.125.17

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

• Unloading System Definition file...

• Connection with target PC RT has been lost.

This errors happened to me almost everytime I used labVIEW and connected to my target. Then I close LabVIEW and MAX, and I still get the error...

I did not find any efficient solution to go through this problem, even though sometimes one of these solution works :

- Rebooting my host computer

- Rebooting the Target

- Re-installing Veristand RT Engine on the target

What would be a good solution ?

Thank you for your help,

Maxime

[StephenB]

If you use LabVIEW to connect to the target, it un sets NI VeriStand as the running application on the target. This is really annoying and I have reported it to R&D before... but we are still waiting on a fix. They might just fix it to have a warning when you connect from LabVIEW so it is more obvious.

The easy fix is reinstalling the NIVS RT engine to the target.

[MaximeD]

Hi,

Thank you for your answer concerning the network connection refused... Even if it is long, I now always resinstall the NIVS RT engine to the target.

I am having another problem now : I am trying to put compactRIO and EtherCAT in scan mode... No more FPGA there.

The Scan Engine and EtherCAT custom device works fine here, it detects every module of my configuration.

But when I deploy, I get this error (at the end of the deployment) :

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

The VeriStand Gateway encountered an error while deploying the System Definition file.

Details:

Error -2147138467 occurred at Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> NI_VS Workspace ExecutionAPI.lvlib:NI VeriStand - Connect to System.vi

Possible reason(s):

An SDO request sent by the master has been aborted by the slave device.

Incorrect initial commands and incorrect PDO selections may cause this error. Check the configuration of the slave device on the device's property page.

=========================

An SDO request sent by the master has been aborted by the slave device.

Incorrect initial commands and incorrect PDO selections may cause this error. Check the configuration of the slave device on the device's property page.

=========================

NI VeriStand:  NI VeriStand Engine.lvlib:VeriStand Engine Wrapper (RT).vi >> NI VeriStand Engine.lvlib:VeriStand Engine.vi >> NI VeriStand Engine.lvlib:VeriStand Engine State Machine.vi >> NI VeriStand Engine.lvlib:Initialize Inline Custom Devices.vi >> Custom Devices Storage.lvlib:Initialize Device (HW Interface).vi

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Thanks for your help,

Maxime

[MaximeD]

Hi,

I solved my problem with error -2147138467 : the only efficient solution I found was to format my cRIO.

Now I am back to the first thing I wanted to do, i.e. having custom FPGA code on the cRIO and using Scan Engine on the EtherCAT chassis.

The thing is I had to do it with the controller page setting as "FPGA mode", not "Scan mode" ! If my project is in "Scan Mode" I get unknown error -61201...

Thanks for your help,

Maxime

[Devin_K]

Hi Wolverine,

In regards to your question, for a software solution to this problem (hybrid scan mode configuration with user-defined variables), the NI-RIO driver would need to be updated in order to allow discovery of these variables after dynamic deployment of a bitfile (not through the LabVIEW project).  I have requested this behavior, but I can't confirm if or when this would make it into the driver.  Also, this driver change would only work with a new LabVIEW version and would not retroactively work with previous LaVIEW versions.  Since NI VeriStand is built on the LV runtime, this would also mean that a new NIVS version would need to be released before I can update the custom device.

So, in short, even if this does get into the driver, it might be a while before I could get it into the custom device.  So, I can't give you a date, but I can tell you it won't be possible short-term (next few months at least).

Regards,

Devin

[Davide_Palandella]

Ciao Devin,

thanks so much for your answer. I found too many limitiation in trying to

use Scan Engine: it's a very exciting technology, but it's frustrating

because every time we just miss

something and there is no easy workaround...

By the way: another big limitation is the limited choice in generating PWM

out with custom frequency; do you know of some improvement in the short

term?

Can you prioritize this feature?

Furthermore, let's say a customer's application requires more current that

the one supplied by a single line of C series DO module (i.e. NI 9476):

an easy solution would be short circuit some output lines in order to

increare the fan-out: using the Scan Engine with NI Veristand does it

allow (hardware) simultaneus DO switching?

Thanks so much

ciao

Davide Palandella | Automotive Segment Manager - National Instruments

Italy

davide.palandella@ni.com | ni.com/automotive | My Linked

Tel: +39 02 413091 | Mob.: 348 2333286 |Fax: +39 02 41309215

NI Automotive Forum 2012. Torino, 6 Giugno 2012

Tema conduttore di questa 8ª edizione di NI Automotive Forum è la

semplificazione dei sistemi complessi Automotive in conformità alle

normative e agli standard di Functional Safety. Novità di quest'anno sono

le sessioni pratiche introduttive sulle tecniche di test real-time con NI

VeriStand e una ricca area espositiva.

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From: Devin_K <web.community@ni.com>

To: Wolverine <davide.palandella@ni.com>

Date: 08/05/2012 00:02

Subject: - Re: Scan Engine & EtherCAT Custom

Device Feedback

Community

Re: Scan Engine & EtherCAT Custom Device Feedback

created by Devin_K in NI VeriStand Add-Ons - View the full discussion

Hi Wolverine,

In regards to your question, for a software solution to this problem

(hyrid scan mode configuration with user-defined variables), the NI-RIO

driver would need to be updated in order to allow discovery of these

variables after dynamic deployment of a itfile (not through the LabVIEW

project). I have requested this behavior, but I can't confirm if or when

this would make it into the driver. Also, this driver change would only

work with a new LabVIEW version and would not retroactively work with

previous LaVIEW versions. Since NI VeriStand is built on the LV runtime,

this would also mean that a new NIVS version would need to be released

before I can update the custom device.

So, in short, even if this does get into the driver, it might be a while

before I could get it into the custom device. So, I can't give you a

date, but I can tell you it won't be possible short-term (next few months

at least).

Regards,

Devin

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[Davide_Palandella]

Dear Colleagues,

I've to manage a project involving:

- NI Veristand that has to run on cRIO-9082 for HIL Testing, achieving 2KHz loop rate (but 1KHz may somehow become acceptable, in case no other solutions will be found)

- the system involves: XNET for CAN communication, Custom FPGA programming (engine signal simulation like our AES Library...), other C Series modules.

- The system requires I/O Expandibility and I found the following potential alternatives:

a) EtherCAT through the Custom Device: it would be great because the "just configurable" approach, but I guess it won't work for the same reason (shortage of DMA channels) becuase I cannot use XNET, Scan Engine and Custom FPGA with NI Veristand on RT target. What do you think? In case it didn't work, would you have any solution development in the short term? In any case, what's the loop rate limitation of EtherCAT (1KHz? Would it work with 2KHZ loop rate, accepting to have the I/O updated every 1ms?)

b) Ethernet expansion with NI 9148: hoping that 0,5ms (or 1ms) updates will be supported on a dedicated network, I'm worried about the effort required in order to allow easy and configurabile integration into NI Veristand? Do you have specific resources? What do you think about?

Thanks so much

ciao

[StephenB]

Just curious - why are you using the 9082? Is it going into a high temperature environment or a dangerous environment? Usually HIL systems use a PXI system. I bring this up because with PXI, you can synchronize EtherCAT and the PXI's timing... however... with cRIO... this is not possible.

So what I would recommend is this:

1. Put your XNET modules, engine simulation, and any custom FPGA programming into the 9082
2. Add on EtherCAT slaves as needed for single point IO only. You can use scan mode (no programming) or FPGA mode. Be aware this IO will be at the same rate as your system, but will not be synchronized (it will go in/out of phase and drift around). In the EtherCAT custom device, make sure "synchronize to ethercat" is unchecked.
3. If you need more FPGA IO for things like engine simulation, sensor simulation, or other more custom code... I suggest adding on a 9157 or 9159. These are just like extra FPGA targets so they are added like normal under the FPGA section of your system definition. No custom device. I do recommend using a 9402 module in each chassis (including the 9082) to synchronize all of the chassis though. See "Special considerations for multiple Non-R Series RIO targets" in this document: NI VeriStand FPGA-Based I/O Interface Tools

I don't recommend the 9148 simply because of the Ethernet bus and interesting software setup. I have also never tried it myself.