PXIe-4162 minimum current sink

[rams20]

Hi all,

I'm trying to setup a PXIe-4162 to draw -50 uA from a chip, but regardless of the settings I use, the SMU is sinking -130 uA. If I set the PXIe-4162 to draw a higher negative current, say -150 uA, I can measure the current to be exactly -150 uA. But if I try to draw a lower negative current than -130 uA then I always read -130 uA.

The specs of this SMU indicate that we can sink/source currents down to at least the units of nA (see Table 3 in the link below). 

PXIe-4162 Specifications - National Instruments (kc-usercontent.com)

But there seems to be a lower limit / baseline value for the current sinking. Did any of you experience something similar? Or have any pointers to what I might be doing wrong?

Thanks! 

[santo_13]

It is definitely an incorrect setup or misunderstanding of your DUT, I have used 4162 in nA ranges for source/sink operations.

Please share more details of your setup, DUT, and SMU configuration.

[rams20]

Hi Santhosh,

I have the DUT pin connected to the SMU via a PCB trace up to a connector where I plug the PXIe-4162 cable that hooks up to the SMU on the PXI chassis. There's a set of decoupling caps near the connector but these shouldn't influence the measurement. 

Below are the SMU configs I'm using:

• forcemode: 'current'
• measuremode: 'voltage'
• voltage: 0
• current: -50e-6
• voltage_limit: 0.24
• current_limit: 200e-6
• sense: 'local'

[santo_13 · Accepted solution]

What is the potential at the DUT pin?

If your DUT pin voltage is very well higher than 0.24V, it will switch to CV from CC.

What are your current and voltage measurements from the SMU when you configure it to sink 50uA?

My theory is that your DUT potential is higher than 0.24V and since SMU switched to CV mode, it needs to sink around 130uA to maintain 0.24V at the SMU terminal.

[rams20]

Hi Santhosh,

You were exactly right, after bumping up the voltage limit to 2.8V I can now correctly set the sink current to 50uA.

Thanks!