Real-Time Module Clock Rate & PV-system MPPT implementation

[punariya]

Dear All,

I'm using NI GPIC to control a two-stage PV inverter (Boost converter and Full-Bridge inverter).

Currently I'm having some issues about implementing the MPPT controller in RT-platform. I'd like to use this controller to give the reference boost input current (ipv) where the rest of controller have already been implemented in FPGA-module. Here are my question...

1) I'm using the Single-Cycle time loop to have a fixed execution time for my MPPT algorithm (around 100 Hz). How can I verify this execution rate (also in the while loop where I read and write the signal from/to the FPGA-module)? I'm trying to count the number of "tick", and in FPGA I can calculate back the period since the clock is 40 MHz....Does any one know what is the clock rate in Real Time module?

2) Does anyone has experience implementing MPPT control algorithm in RT-module before? I'm not sure if I should use a sequence structure or I can keep the measurement and the MPPT algorithm run in parallel like in the figure below. Also, I think it might be neccessary to use a Low-pass filter to reduce noise from the measured PV current and voltage. Any suggestion?

Thank you so much!

Best regard,

Ariya

[RVallieu]

On Real-Time targets the structure is called a Timed Loop.  It has built-in timing functionality for letting the developer know the execution time of the loop, if it finished late or early and by how much, etc. without the need for you to put in benchmark tick time VI in what you think is parallel to the code executing in the Timed Loop.

Look at the node data available built-in on the Timed Loop:

http://zone.ni.com/reference/en-XX/help/371361L-01/glang/timed_loop/

Your bottom loop is running unthrottled on the processor with no sleep time for other tasks to complete.  Timed Loops run at a Priority Above Time Critical Priority - thus it will attempt to maintain exact timing on the RT system by preempting the other code of lesser Priority. 

Can you not run at 100Hz in the Timed loop with the FPGA access code to read/write from the Front Panel FPGA controls combining everything into the Timed Loop?

The RT system will typically give you access to a microsecond clock instead of the usual Windws millisecond clock.

Also I do not see how are you controlling this without running in RT Front Panel Communication mode - which will considerably slow down your code and not allow for deterministic execution of your code.  If you are simply hitting the RUN button on your RT VI and interacting with the front panel controls this  is going to cause problems, as the Front Panel is running on your development computer and LabVIEW RT is running the block diagram.  If this is just a subVI that is running in your RT EXE then disregard this paragraph.

[punariya]

Thank you very much, RVallieu!

Now I've managed to solve the issues. Nevertheless, you also give me a lot of good inputs to improve my programme. As you have said, now I have to interact with the Font Panel but it's also in the stage of debugging. I haven't notice before that this could cause some problem. I mean, initially, I'd like to make a programme with a user interface (similar to what they have in dSPACE for example). If that is the case, do you have any suggestion? or should I move it to PC platform?

[RVallieu]

It depends on what your RT target is that you are using - some of them can direclty run an HMI at the expense of some determinism (The LINUX cRIO comes to mind).

Normally you need to develop an HMI application to communicate to the RT target over Ethernet by some means to pass data back and forth for control of the RT and data display on the HMI system.

Ryan

[knight_ahmed65]

Hello

Iam interested to have a look on your MPPT LV vi, specially if implemented on RIO

My regards

[knight_ahmed65]

Hello

Iam interested to have a look on your MPPT LV vi, specially if implemented on RIO

My regards