05-28-2009 09:35 AM
Hi,
I am actually doing an internship on a CRIO 9074. I am trying to do a PID loop to control a brushless motor.
I have coded with "Front Panel" my application. But I would like to try DMA FIFO and Scan Mode to compare the efficiency.
Could you give me the method to achieve Scan Mode ?
I have try to look at "NI distributed Distributed System Manager", but I haven't the same thing that on the website course.
Do you where I can find some documentation ?
Thanks in advance,
Arnaud
05-28-2009 08:45 PM
05-29-2009 03:44 AM
Thanks,
But I have found why I haven't the same than on the NI website. It's just because I haven't already installed the scan mode yet on the CRIO. (Error message).
I have two others questions :
I have a NI9263 module on my CRIO 9074, I just want to have an estimation of the ressource used in the FPGA to realise a simple voltage output.
How many time clock (of FPGA) do this module need to realise an simple output ?
Thanks again...
Sorry for my english, I am french... (I hope that you understand my questions).
05-29-2009 05:58 AM
You should be able to follow the above mentioned steps to find tutorials on scan mode. You will definitely need to have installed on the cRIO to try it out.
You can always compile an FPGA application to find out how much resource will be used. Just right-click on the VI and select compile. I don't think you have this ability in scan mode.
You will need to try this out. First, be sure whether you are using scan mode or FPGA.
05-29-2009 06:54 AM
Hi,
I have already coded my project with "front panel" in FPGA mode.
I think it's ok for Scan mode, but I asked all my question in the same topic.
My boss want I put my code on the FPGA to see if it's faster. But it seems to be too big, that's why I wanted to know the ressources used to realise a output with NI 9263. (only)
I can see it at the end of the compilation.
The time necessary to implement this output is really important to know the speed of my loop control.
Thanks again.
Arnaud