Trouble building E310 bitfile (Vivado)

[mlongtin]

I'm using UHD v4.4, and I'm trying to build the FPGA .bit file for my e310.  I know that the .bit file is included in the prebuilt UHD 4.4 image, and that I can get it from there.  My *ultimate* goal is to build a .bit file that's compatible with UHD 4.4 and contains the fft, logpwr, and window modules.  I'm taking baby steps, the first of which is to build the default .bit file as described in e310_rfnoc_image_core.yml.

I downloaded Vivado 2021.1 and I'm trying to build the base .bit file via:

cd uhd/fpga/usrp3/top/e31x

source setupenv.sh

rfnoc_image_builder -y e310_rfnoc_image_core.yml -d e310 -t E310_SG3 -F ~/uhd/fpga

I see the following error:

Environment successfully initialized.
make -f Makefile.e31x.inc viv_ip NAME=E310_SG3_IP ARCH=zynq PART_ID=xc7z020/clg484/-3 E310_SG3=1 TOP_MODULE=e31x EXTRA_DEFS="E310_SG3=1" DEFAULT_RFNOC_IMAGE_CORE_FILE=e310_rfnoc_image_core.v DEFAULT_EDGE_FILE=/home/ettusdevel/uhd/fpga/usrp3/top/e31x/e310_static_router.hex
make[1]: Entering directory '/home/ettusdevel/uhd/fpga/usrp3/top/e31x'
BUILDER: Checking tools...
* GNU bash, version 5.0.17(1)-release (x86_64-pc-linux-gnu)
* Python 3.8.10
* Vivado v2021.1_AR76780 (64-bit)
IP build for E310_SG3_IP DONE . . .
make[1]: Leaving directory '/home/ettusdevel/uhd/fpga/usrp3/top/e31x'
make -f Makefile.e31x.inc bin NAME=E310_SG3 ARCH=zynq PART_ID=xc7z020/clg484/-3 E310_SG3=1 TOP_MODULE=e31x EXTRA_DEFS=" E310_SG3=1 " DEFAULT_RFNOC_IMAGE_CORE_FILE=e310_rfnoc_image_core.v DEFAULT_EDGE_FILE=/home/ettusdevel/uhd/fpga/usrp3/top/e31x/e310_static_router.hex
make[1]: Entering directory '/home/ettusdevel/uhd/fpga/usrp3/top/e31x'
BUILDER: Checking tools...
* GNU bash, version 5.0.17(1)-release (x86_64-pc-linux-gnu)
* Python 3.8.10
* Vivado v2021.1_AR76780 (64-bit)
Could not read parser configuration from: /home/ettusdevel/uhd/fpga/usrp3/top/e31x/dev_config.json
[00:00:00] Executing command: vivado -mode batch -source /home/ettusdevel/uhd/fpga/usrp3/top/e31x/build_e31x.tcl -log build.log -journal e31x.jou
ERROR: [Common 17-107] Cannot change read-only property 'generate_synth_checkpoint'.
[00:00:14] Current task: Initialization +++ Current Phase: Starting
[00:00:15] Current task: Initialization +++ Current Phase: Finished
[00:00:15] Process terminated. Status: Failure

========================================================
Warnings: 0
Critical Warnings: 0
Errors: 1

make[1]: *** [Makefile.e31x.inc:121: bin] Error 1
make[1]: Leaving directory '/home/ettusdevel/uhd/fpga/usrp3/top/e31x'
make: *** [Makefile:80: E310_SG3] Error 2

Any ideas?

Thanks.

[steven.menk@nrl.navy.mil]

Did you ever resolve this?  (I'm having the same issue)

[mlongtin]

Hi Steven,

Unfortunately, I haven't been able to resolve it.  I reverted to UHD 3.14, and I'm able to build custom FPGA images on that version, so at least it's working for me, but it would be nice to be able to upgrade to more modern versions of UHD.

Mike

[steven.menk@nrl.navy.mil]

Thanks.  Did you get 3.14 from the Git repository?

[mlongtin]

Yes, I downloaded it from the git repo and cross-compiled it on my Ubuntu laptop.  There are excellent instructions that take you through it step by step here:  https://kb.ettus.com/Software_Development_on_the_E3xx_USRP_-_Building_RFNoC_UHD_/_GNU_Radio_/_gr-ett...

If you don't want to build it yourself, you can always download the images from here:  https://files.ettus.com/binaries/cache/e3xx/ and use dd to copy them to an SD card.

[et2003]

I am having the identical issue. I really want this done in UHD 4.8.0.0. 

[et2003]

I have potentially fixed this issue:

You really do need the AR76780 Vivado 2021.1 Patch...

Additionally to installing Xilinx 2021.1, you must install 

AR76780_Vivado_2021_1_preliminary_rev1.zip

and create a "patches'" folder in your tools/Xilinx/Vivado/<viv_version> installation. Then extract the zip file.

The patch is attached in this link:

https://adaptivesupport.amd.com/s/article/76780?language=en_US

[steven.menk@nrl.navy.mil]

Thank you!  I really appreciate you taking the time to update this!