References to FPGAs

[Paul_Conaway]

(1) I have an FPGA with 3 or more different clock domains
I wish to load it and start it running.
This will, among other things, generate a 25 MHz clock
for my unit under test. I do not want to stop or abort it.

(2) Here I set a score of parameters for one part of the FPGA.
The settings come from a Tab delimited text file.
These are timing settings for a single cycle timed loop.

(3)  Here I send a binary bit to a FIFO which acts as an occurance or notifier to run the aforementioned timing.

(1) I wish to do this sequence of operations from TestStand, where this would be done once in Setup,

(2) ... this would be done occasionally perhaps at the start of a sub-sequence,

(3) ... and this would be done frequently once for each measurement

My problem is with passing FPGA references:
I have tried using strict typedefs, Globals, functional globals, and the FPGA "Upcast" function.
In every case I have had to right click on the input or output control and directly tie it to the desired FPGA Bitfile.
If that is indeed necessary, then I see no way to keep the sub VIs generic.

If I try to pass the reference by any means so that I can run the third sub VI independently
(out of the context of this the main VI) it does not work. The reference is invalid or closed.

I may as well use "Open FPGA VI Reference" and "Close FPGA VI Reference" as needed inside each sub VI.
The only difference would be that the first, above, is the only one to have the "Run" box checked.
These sub VIs would not be generic. They would be tied intimately with the FPGA bitfile they are using.

Has anybody had particular experience passing FPGA references?

of what use id the FPGA Upcast function?

[Paul_Conaway]

This is a followup to the previous post:

Two things are a problem:

a)       I have at least two versions of the FPGA program that vary only in the pinouts used.

One is for a receiver test fixture the other for a transmitter fixture.

The functionality, i.e., the code, of the two versions is identical. I use the same VI to compile both.

I would like to make the VIs that call the FPGA functions identical too.

But as soon as I tie a reference input or output to a particular bitfile or typedef of a bitfile, it becomes a changed VI.
It is different from the same VI referencing the other bitfile. So…

There need to be two otherwise identical Vis for every function, one for the Receiver, another for the Transmitter.

There seems to be no way around this. There is no way to make the calling functions generic.

Configuration management will just have to live with two versions of every function, e.g.,Start_timing_Rx.vi and Start_timing_Tx.vi

b)      The references seem to become automatically invalid beyond the scope of the host vi, the vi containing the “open fpga vi reference”.
I can make wires work and I can call several sub vis from one host, (main or top level) vi.
But I am unable to make any form of a global variable function in the place of a wire.
In my application, I need to call the sub vis from TestStand and need to have each sub vi operate independently of the one that opens the reference.
I believe that this will not be possible either. So…

Every sub vi that calls an fpga function will need to perform its own “open fpga vi reference” function, and to be nice, a close reference also.

Every one of the sub vis will need to be tied to the bitfile anyway by virtue of a) above, so I may just as well open a new reference for every instance of every calling function. Thus I will not need to pass references in TestStand.

My own experimentation which has led to these conclusions is probably a “general truth” and may prove useful to others.

P.S. I do not find any use of the fpga “Upcast” function to help my needs. What is it for anyway? Are there any examples?

[Paul_Conaway]

After some discussion with NI I have discovered how to use the FPGA Up Cast function.

This is the way Up Cast is meant to work. The clip below may be blury but the functions are simple.

Wire A and B are substantially different because they are typed to two different bitfiles.

If wired to the same output C, one or the other would become broken.

Upcast makes them generic enough to do that.

However for my application it will not work because -

Up Cast is not supported for FPGA VIs with multiple clocks on the block diagram.

I must use my previously discussed workarounds.

Paul Conaway

Lockheed Martin

Radar Test Systems

[srm@viewpointusa.com]

Hi Paul,

Could you post your code, or a sanitized version of your code, so I can take a crack at your problem.  I have been working with FPGA for a couple of years now.  I think there should be a way to do what you are asking.

Stu McFarlane