Hi Xiaconggo,
I've got the same problem using a FlexRIO 7961 with 5734 module.
It produces a link error in Xilinks Vivado compiler :
ERROR:Simulator:861 - Failed to link the design
I'm using LabVIEW 2015 with Xilinx Vivado 14.7 and Xilinx ISE 14.4.
Apparently it comes from the Xilinx tools not running under WIndows 8 nor Windows 10.
So your FPGA Compiler can normally compile your code, but apparently the IP Builder compiler cannot.
I would suggest to try this build with a Win7 computer.
Regards
LabVIEW Architect - Founder and CEO - Phalanx
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