Create Timing Source problem in RT deterministic loop

[byronb]

I'm updating an old LV 7.1 vi to run with LV10 and DAQmx.  We have a deterministic timed loop driven by an external 10 kHz clock source.  As I understand, it should be possible to set up this functionality using a timed loop and the DAQmx Create Timing Souce vi.  The attached image shows how I wired it up.

This vi is deployed to a PXI system running LV 2010 with 6608 system timing card (Dev 1).  I'm using counter 1 on the 6608 to create the timing source.  I have an external 10 kHz square wave (5 V p-p)  connected to Src1 (PFI35) on Dev 1.

The problem:  the loop seems to be using a 1 kHz clock, even though I've specified the counter and input for a 10 kHz source.  If I choose a frequency of 20 Hz (500 edge counts for a 10 kHz clock) the actual loop frequency is only 2 Hz.  But, the loop stops if I disconnect the 10kHz signal, so it is somehow using the specified counter !!??  How can this be?  Is there additional counter configuration needed here??  I've verified the external clock signal is exactly 10kHz with an oscilloscope.

Thanks for any thoughts.

[byronb · Accepted solution]

OK.  I solved this one.  You need to wire a "1" constant to the period input node of the timed loop.  The default value of "10" will only execute the loop on every 10th clock pulse, hence the factor of 10 decrease in loop frequency.