I'm not 100% certain I understand these last questions clearly. Let me re-describe how things would (need to) work on a 6602, and where the main difficulties would be.
1. The 1st counter generates the pulse signals. The task would be configured for *continuous* pulse generation, but you would use pause-triggering and very careful hardware timing config to implement finite bursts of pulses.
2. The 2nd counter generates the pause-triggering signal that acts to enable/disable counting operations on the 1st counter. Pausing is like disabling and when the 1st counter isn't counting, it basically "ignores time" until you unpause / re-enable it.
3. When the pause trigger signal changes from unpaused to paused, the 1st counter's output will *NOT* reset to its idle state. It will simply lock in at whatever state it happens to be in, high or low. (This was the reason I outlined the need for careful exact timing back in msg #6.)
4. Because the 1st counter is in continuous generation mode, you're allowed to change pulse parameters on-the-fly without stopping the task. If each "cycle" or "burst" of pulses needs to have distinct parameters, you should be reprogramming the pulse parameters during the brief time that the counter is paused.
You won't be able to achieve this perfectly because the OS won't allow you to rely on perfect software timing. But you *might* manage to succeed to an acceptable degree.
5. To control the # of cycles of finite pulse bursts means you need to control the # of times the 2nd counter gets re-triggered and generates the pause signal used by the 1st counter. You won't be able to do this via hardware config on the 6602. It will also be a software operation.
To accomplish it, your software has to be aware of the # of times the 2nd counter has been triggered. When you get to the magic # (let's say 18), you *then* need to wait for that particular cycle of pulses to finish. Then, *before* the next trigger comes in, you need to stop counter 1's task and then also counter 2.
Again, the timing would need to be really precise, and the OS isn't going to let you achieve it perfectly.
6. A newer board such as a 6612 has more advanced capabilities and would give you more ways to try to accomplish the timing-critical changes. Your *exact* needs may still not be trivial, but a 6612 would put you in a better position to try to accomplish your pulse generation requirements. Here are some of its features that the 6602 doesn't share:
- buffered pulse generation - you can predefine a set of pulses with varying frequency and duty cycle and then generate them with hardware-precise timing
- retriggerable finite pulse generation - supported natively rather than via the workaround needed for the 6602
- finite pulse generation using only 1 counter - the 6602 requires 2 working together
- hardware-clocked DIO - another way to predefine and control precise timing signals
- Kevin P
ALERT! LabVIEW's subscription-only policy coming to an end (finally!). Permanent license pricing remains WIP. Tread carefully.
