12-06-2016 01:05 AM
Hi guys,
I will appreciate if one helps me to find the correct structure design for the application below.
lets say I have five steps of test:
For the sequencing of AOs I put a finite analog output in a for loop and put the A1, A2, A3 in an array as the index of loop and put the error handler outside to make sure each loop is done completely (attached figuere). Now I want to start at the given conditions of second column.
I don't know the correct structuring, my devices are as below:
Chassis: cDAQ-9178
AO module: NI cDAQ 9263
AI module: NI cDAQ 9207
I know it is a basic problem as I have recently started to work with NI.
Thanks a lot.
12-06-2016 07:42 AM
Do not post a picture of a Block Diagram -- post the VI, instead. We can edit a VI, inspect a VI, modify a VI, test (or run) a VI, but can only glance at a picture and then give up.
Bob Schor