Unable to Read Data from DMA FIFO from Target to Host

[lquarshie]

Hello, I have an analog signal from the analog input AI0 and then send data to the Host PC for processing.

However, I have tried the basic implementation of this but there's no data read on the Host VI.

What am I not doing right?

The attached file is the project file.

Thank you.

[ZYOng]

Firstly, you place a Host VI under an FPGA target and an FPGA VI under My Computer.

I would recommend you explore the shipping examples. Go to Help >> Find Examples... >> Hardware Input and Output >> R Series >> Fundamentals >> Data Transfer and Storage >> FPGA to Host

[lquarshie]

I checked that out, tried the example, and modified the vi to match my work and stream the data.

Thank you.

I appreciate your assistance.