PET and PER lines in a PXI chassis

[MLXCE]

Hello,
Just wondering how the connector is defined in the PXI spec.
The PET lines, are these the transmission lines from controller to card (data sent from controller to card) or from card to controller (data sent from card to controller)?

We want to connect a PCI to USB host controller device to it. But want to be sure that we connect T from chassis to R of device and R from chassis to T of device.

[Captain_K]

Hi There,

The PET lines are the transmit lines from the controller slot to the peripheral slots. This is actually defined in the CompactPCI Express specification, which the PXI-5 spec is based on. 

Just as a side note, I don't think it's possible to send PCIe packets via a USB connection, unless there's some new magic devices on the market. We can use a PXIe-8301 remote controller to connect via Thunderbolt connections, but this is only possible because Thunderbolt can transfer PCIe packets.

[Robert__R]

Hi MLXCE,

The PET lines should be connected to the TX lines of your device (through series capacitors) and the RX lines connect to the PER lines (the naming of those is a pet peeve of mine for this very reason).

Also note that RefClk is LVPECL, not the standard HSCL, so you'll need to handle that if your silicon isn't tolerant of the higher voltage lines.

- Robert