PXI

cancel
Showing results for 
Search instead for 
Did you mean: 

Synchronizing 5772s using 6674T

Solved!
Go to solution

We need to synchronize two 5772 using external clock with a sampling rate of 665MHz. We are planning to use 6674T for generating clock at 665MHz from two outputs. However according to Figure A-8 in the manual of 6674T, the signal level at these frequencies are below 800mVpp. But 5772 accepts +2 dBm (800 mVpk-pk) to +16 dBm (4 Vpk-pk) according to its manual. 

 

Do you think 5772s will lock to the clock of 6674T at 665MHz.

0 Kudos
Message 1 of 9
(6,179 Views)

The 6674T should work fine with the 5772. Not sure how you plan on splitting the clock to both of them, just make sure it doesn't create a phase offset or reduce the voltage level.

 

The 6674T should be able to generate a 665MHz clock pretty easily, and that frequency falls comfortably into the 400MHz to 800MHz range spec'd for the 5772.

 

For synchronization, you may want to take a look at the Acquisition Engine example that the FlexRIO Instrument Development Library 1.3.4 installs. It performs some calibration that is required to get repeatable synchronization from multiple 5772s on power up.

0 Kudos
Message 2 of 9
(6,163 Views)

Thank you David,

 

In fact I am a bit confused about clock generation. Is it possible to use the dstar lines for synchronization at 665MHz, or the only way is to use the clk out of 6674T(or maybe PFI_LVDS with an appropriate LVDS to single ended converter.).

 

Ozan

0 Kudos
Message 3 of 9
(6,144 Views)
Solution
Accepted by topic author ozan_icin

You can only use the DStarA lines for clock generation if the FAM has the necessary clock switching circuitry to route a clock from the IOModSync line to the ADC. An example of a FAM with the components requied to source a clock from the DStarA for use as a sample clock is the 5782. The 5772 unfortuneately does not have this capability, and consequently can only accept an external clock through the CLK IN connector on the front panel. 

 

 

0 Kudos
Message 4 of 9
(6,134 Views)

Hi David,

Is there any example code that demonstrates using external sample clock NI 5782 either through

1) External Sample Clock through IoModSyncClock (A capability mentioned in on page 9 of NI 5782 user manual). Or,

2) External Sample Clock through the CLK IN connector (A capability mentioned in on page 9 of NI 5782 user manual)

 

In both the option my sample clock source would be PXIe-6674T.

 

Thanks & Regards,

Mondeep

0 Kudos
Message 5 of 9
(4,673 Views)

The example finder has a 'clock select' example for the 5782. I'd take a look at that.

0 Kudos
Message 6 of 9
(4,646 Views)

I was looking for example other than those in the clock select example. They don't behave as expected. Atleast that's what I observed. Moreover its not integrated with PXIe-6674T. I was looking of a integrated example. One simple feedback, when you generate 125MHz and feed it to the clk in of 5782, I found no of sample representing one cycle of a 1MHz input signal is about 30 samples whereas it should be 125samples. secondly, no indication or documentation/ instruction on how to get IOModulesync routed to 5782 as sample clock specially with 6674T. 

0 Kudos
Message 7 of 9
(4,636 Views)

There are several reasons you're likely seeing unexpected behavior. Can you start a new thread? I'll respond there.

0 Kudos
Message 8 of 9
(4,616 Views)

I have started the new thread "External Clocking of NI 5782 with PXIe-6674T"

0 Kudos
Message 9 of 9
(4,604 Views)