Make Bitfile Paths Relative, Not Absolute

[James_McN]

Currently when you build a VI the bit file path is stored as relative (you can see it in the project XML). This means if you change the project location either:

• Moving machines.
• Checking in and out of source code control on different machines

You have to recompile the FPGA to use VI mode or run interactively. It seems the bitfile could be stored as a relative path like all VIs in the projects.

Cheers,

James

[T-REX$]

I believe this is already addressed in 2013. Check out the new Open Dynamic Bitfile Reference function to reference an FPGA bitfile by path at run time when communicating with an FPGA target. Using this new function should entirely mitigate the problem... If I understand your idea correctly. Just use the Application Directory node (or whichever node is relevant) and build the path at runtime.

 - TJ

[James_McN]

That certainly helps but I am also thinking about the project link so that it would still be able to run interactively or using the VI option in FPGA Open Reference even after moving computers.

[CMal]

I agree that this can be a very annoying problem.  The bitfile path seems to be the only type of item in the project file that gets stored as an absolute path, which doesn't make much sense.  Accessing the bitfile programmatically isn't really a problem, even prior to LabVIEW 2013.  The problem is with having to recompile after moving a folder in order to run in interactive mode.

[Shinton]

We run into this problem every day (using LV2012) and the way we get around it is to use a PC layer and reference the bitfile.  It does require duplicating the FPGA VI's front panel on the PC layer and wiring the controls and indicators up to an FPGA Read/Write Control node, but that is a thousand times faster than waiting for a recompile!

[D*]

CMal, How do you do "Accessing the bitfile programmatically isn't really a problem, even prior to LabVIEW 2013"?

I'm using LV 2012, but the "Open Dynamic Bitfile Reference" appears to be LV2013?

[PBP]

I have also faced this problem but now What I do is I go to FPGA build specification properties and change bitfile name to previous complile name. This works if you have just moved your code from one location to another without changing in FPGA VI.

Second problem is host VI shows error. For this I right click to "Open FPGA VI Reference" VI and Configure Open FPGA VI Reference option and repoint to build specification.

Above steps always solves my problem incase of source code is transffered from on PC to other PC or change source code location.