Direct PC memory access by R-series PCIe FPGA

[gharris]

I'd like to have a way to give the FPGA on my PCIe card direct access to a block of the host PC's RAM.  At the moment, the FPGA is limited to its internal RAM and whatever might be on the PCIe card. With my PCIe-7841, I have about 1MB available to the FPGA.  If I need more, I have to use DMA FIFO transfers - the FPGA can use one FIFO to ask the host for some data and the host can send it to the FPGA in another FIFO.  This is a lot of overhead compared with simply using a memory method node to access the FPGA RAM.

So how about a method to allocate a block of memory in the host's RAM that the FPGA can access directly over the PCIe bus with minimal involvement by the host.  For simplicity, it will probably need to be limited to a contiguous block so that there are no gaps in the addresses - the FPGA would only need to know the start address and the number of bytes in the block.  Ideally safeguards should be established to ensure the FPGA doesn't access memory outside the allocated block, but leaving that to the LabVIEW programmer would be fine.

[X.]

I don't see how this could be achieved any differently than it is now using a FIFO using DMA... The FPGA is configuring its resources on demand. PC memory is not part of them, so you have to implement some communication with it and this is done by a DMA FIFO mechanism. Unless FPGA and PC architectures are totally modified (which is not NI's business), that won't change.

However I am with you with a tendency for NI to always be one year behind in terms of the max power of the FPGA implemented on their products...which is understandable as they need to design. build and test them before releasing them to market. The most recent Xilinx FPGA can have much larger memory blocks than the one you mention. For instance, the Virtex 7 can have up to 85 MB (http://www.xilinx.com/products/silicon-devices/fpga/virtex-7/). And of course they could have on board memory (that is on a daughter board next to the FPGA) with a dedicated transfer protocol that would totally bypass the need of communicating with the PC...

[gharris]

I suppose what I'm asking for is to make the FPGA have a memory controller that will use the same RAM that the host CPU is using.  I can see how that could be a disaster.  I like the idea of adding external RAM to the PCIe card - it could even use the same form factor as used in laptops.  You could add a lot of memory for very little $.

[gharris]

Thinking more about how to give the FPGA some external RAM - how about using one of the 68 pin DIO connectors on the R-series card?  A 64MB parallel 3.3V RAM chip can be bought from DigiKey for $5.46 (557-1089-1-ND).  It could be put on a simple board with a connector, 3.3V LDO regulator powered off the 5V output and plugged straight onto the connector. It should be possible to make it small enough to not interfere with the other DIO connector.

[Darren]

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